PSVA liquid crystal display panel comprising a pixel electrode which is patterned with a plurality of trenches corresponding to a pattern of a passivation layer

Patent metadata

Field	Value
Publication number	US-9817280-B2
Application number	US-201514787766-A
Country	US
Kind code	B2
Filing date	Oct 13, 2015
Priority date	Aug 31, 2015
Publication date	Nov 14, 2017
Grant date	Nov 14, 2017

Abstract

The present invention provides a PSVA liquid crystal display panel, comprising an upper substrate ( 1 ), a lower substrate ( 2 ) oppositely located to the upper substrate ( 1 ) and a liquid crystal layer ( 3 ) located between the upper substrate ( 1 ) and the lower substrate ( 2 ); the lower substrate ( 2 ) comprises a second substrate ( 21 ), a thin film transistor, a passivation layer ( 22 ) and a pixel electrode ( 23 ); the lower substrate ( 2 ) comprises a plurality of pixel areas, and the passivation layer ( 22 ) is a passivation layer which is patterned, and is respectively formed the same pattern corresponding to the plurality of pixel areas, and the pattern comprises a plurality of trenches ( 221 ) extending toward various directions; the pixel electrode ( 23 ) is entirely attached to the passivation layer ( 22 ) which is patterned and comprises a corresponding pattern with the passivation layer ( 22 ); a depth of the trench ( 221 ) is 2000-4000 Å. The PSVA liquid crystal display panel of the present invention possesses higher transmittance and excellent optical performance.

First claim

What is claimed is:

1. A PSVA liquid crystal display panel, comprising an upper substrate, a lower substrate oppositely located to the upper substrate and a liquid crystal layer located between the upper substrate and the lower substrate;
the upper substrate comprises a first substrate, and a common electrode located on the first substrate;
the lower substrate comprises a second substrate, a thin film transistor located on the second substrate, a passivation layer located on the second substrate and the thin film transistor, and a pixel electrode located on the passivation layer;
the lower substrate comprises a plurality of pixel areas, and the passivation layer is respectively formed the same pattern corresponding to the plurality of pixel areas; the pattern comprises a plurality of trenches extending toward various directions;
the pixel electrode is an entire surface electrode of which a thickness is uniform and continuous; the pixel electrode is entirely attached to the passivation layer which is patterned and comprises a corresponding pattern with the passivation layer;
a depth of the trench is 2000-4000 Å.

2. The PSVA liquid crystal display panel according to claim 1 , wherein a thickness of the passivation layer is great than or equal to 5000 Å.

3. The PSVA liquid crystal display panel according to claim 1 , wherein corresponding to each pixel area, the passivation layer is divided into four sub areas.

4. The PSVA liquid crystal display panel according to claim 3 , wherein the pattern is a pozidriv pattern, and the passivation layer comprises a vertical main piece, a horizontal main piece orthogonally cross with the vertical main piece and a plurality of strip branches connected with the vertical main piece or the horizontal main piece and respectively extended toward periphery; the plurality of strip branches are spaced with one another and form an included angle with the vertical main piece or the horizontal main piece; the trench is located between two adjacent strip branches.

5. The PSVA liquid crystal display panel according to claim 4 , wherein the included angle is 45 degrees.

6. The PSVA liquid crystal display panel according to claim 1 , wherein material of the passivation layer is Silicon Nitride.

7. The PSVA liquid crystal display panel according to claim 1 , wherein material of the common electrode and the pixel electrode is ITO.

8. The PSVA liquid crystal display panel according to claim 1 , wherein the thin film transistor comprises a drain, and the passivation layer comprises a via hole correspondingly located above the drain, and the pixel electrode penetrates the via hole and is connected with the drain of the thin film transistor.

9. The PSVA liquid crystal display panel according to claim 8 , wherein the via hole and the trenches are manufactured at the same time by one photolithography process with one gray tone mask.

10. The PSVA liquid crystal display panel according to claim 1 , wherein the common electrode is a plane type common electrode of which a thickness is uniform and continuous.

11. A PSVA liquid crystal display panel, comprising an upper substrate, a lower substrate oppositely located to the upper substrate and a liquid crystal layer located between the upper substrate and the lower substrate;
the upper substrate comprises a first substrate, and a common electrode located on the first substrate;
the lower substrate comprises a second substrate, a thin film transistor located on the second substrate, a passivation layer located on the second substrate and the thin film transistor, and a pixel electrode located on the passivation layer;
the lower substrate comprises a plurality of pixel areas, and the passivation layer is respectively formed the same pattern corresponding to the plurality of pixel areas; the pattern comprises a plurality of trenches extending toward various directions;
the pixel electrode is an entire surface electrode of which a thickness is uniform and continuous; the pixel electrode is entirely attached to the passivation layer which is patterned and comprises a corresponding pattern with the passivation layer;
a depth of the trench is 2000-4000 Å;
wherein a thickness of the passivation layer is great than or equal to 5000 Å;
wherein corresponding to each pixel area, the passivation layer is divided into four sub areas;
wherein material of the passivation layer is Silicon Nitride;
wherein material of the common electrode and the pixel electrode is ITO;
wherein the thin film transistor comprises a drain, and the passivation layer comprises a via hole correspondingly located above the drain, and the pixel electrode penetrates the via hole and is connected with the drain of the thin film transistor;
wherein the common electrode is a plane type common electrode of which a thickness is uniform and continuous.

12. The PSVA liquid crystal display panel according to claim 11 , wherein the pattern is a pozidriv pattern, and the passivation layer comprises a vertical main piece, a horizontal main piece orthogonally cross with the vertical main piece and a plurality of strip branches connected with the vertical main piece or the horizontal main piece and respectively extended toward periphery; the plurality of strip branches are spaced with one another and form an included angle with the vertical main piece or the horizontal main piece; the trench is located between two adjacent strip branches.

13. The PSVA liquid crystal display panel according to claim 12 , wherein the included angle is 45 degrees.

14. The PSVA liquid crystal display panel according to claim 11 , wherein the via hole and the trenches are manufactured at the same time by one photolithography process with one gray tone mask.

Assignees

• Shenzhen China Star Optoelect

Inventors

• Gan Qiming

Classifications

• G02F2203/01

  transmissive · CPC title

• H01L27/1248

  Electricity · mapped topic

• G02F2201/123

  pixel · CPC title

• G02F1/133345

  Insulating layers (G02F1/1335, G02F1/1337, G02F1/135, G02F1/136 take precedence) · CPC title

• G02F1/134309 Primary

  characterised by their geometrical arrangement · CPC title