CMOS image sensor and imaging method implementing correlated double sampling and compression

Patent metadata

Field	Value
Publication number	US-9813652-B2
Application number	US-201514927129-A
Country	US
Kind code	B2
Filing date	Oct 29, 2015
Priority date	Aug 29, 2013
Publication date	Nov 7, 2017
Grant date	Nov 7, 2017

Abstract

An image sensing device may include one or more compression modules that compress digitized pixel reset values obtained from light sensing elements. The device may perform a CDS operation in which the compressed reset values are stored, decompressed, and then subtracted from light dependent values obtained from the light sensing elements. The compressed reset values may also be output from the device without CDS subtraction having been performed. The light dependent values may also be compressed. CDS corrected output pixel values may also be compressed.

First claim

We claim:

1. An image sensing device comprising:
an array of light sensing elements configured to output reset signals and light-dependent (LD) signals;
an analog-to-digital converter circuit configured to digitize the reset signals into digital reset values and to digitize the LD signals into digital LD values;
compression circuitry configured to generate compressed digital reset values based on the digital reset values and to generate compressed digital LD values based on the digital LD values.

2. The image sensing device of claim 1 ,
wherein the compression circuitry comprises a switch, reset value compression circuitry, and LD compression circuitry,
the switch is configured to direct the digital reset values to the reset value compression circuitry, and to direct the digital LD values to the LD compression circuitry,
the reset value compression circuitry is configured to generate the compressed digital reset values based on the digital reset values, and
the LD value compression circuitry is configured to generate the compressed digital LD values based on the digital LD values.

3. The image sensing device of claim 2 ,
wherein the reset value compression circuitry is configured to generate the compressed digital reset values by, for each of digital reset values:
generating a predicted reset value based on a prediction function,
generating a prediction error based on the predicted reset value; and
generating one of the compressed digital reset values based on the prediction error.

4. The image sensor of claim 3 ,
wherein the reset value compression circuitry further includes: a quantizer configured to generate a quantized prediction error associated with each digital reset value; mapping circuitry configured to map the quantized prediction error to an absolute-value prediction error for each digital reset value; a state update generator configured to generate an encoding parameter based on the absolute-value prediction error; and an encoder configured to encode the absolute-value prediction error based on the encoding parameter to generate the compressed digital reset value for each digital reset value.

5. The image sensing device of claim 2 ,
wherein the reset value compression circuitry includes a Golomb-Rice encoder.

6. The image sensing device of claim 1 ,
wherein the compression circuitry further includes rate control circuitry to control a distortion parameter of the compression section based on the total number of data bits generated by the compression circuitry.

7. The image sensing device of claim 1 ,
wherein the compression circuitry includes a plurality of encoders in communication with a line buffer, the line buffer being configured to store incoming digital values from the analog-to-digital converter circuit, and wherein the compression circuitry is configured to generate in each clock cycle a plurality of compressed digital values corresponding to a plurality of the light sensing elements.

8. The image sensing device of claim 7 ,
wherein the line buffer receives the incoming digital values in an array scan ordering, the plurality of encoders are configured to encode the digital values stored in the line buffer in a formation that is different from the array scan ordering.

9. The image sensing device of claim 1 ,
wherein the compressed digital reset values include variable bit-length digital values of average bit-length l, the average bit-length l being less than the bit-length of the digital reset value.

10. The image sensing device of claim 1 ,
wherein the compression circuitry comprises a single compression circuit that is configured to generate the compressed digital reset values based on the digital reset values and to generate the compressed digital LD values based on the digital LD values.

11. The image sensing device of claim 1 ,
wherein the image sensing device is a color image sensor, and the LD values are color LD values.

12. An image sensing device comprising:
an array of light sensing elements configured to output reset signals and light-dependent (LD) signals;
an analog-to-digital converter circuit configured to digitize the reset signals into digital reset values and to digitize the LD signals into digital LD values;
reset value compression circuitry configured to generate compressed digital reset values based on the digital reset values;
reset value decompression circuitry configured to generate decompressed digital reset values based on the compressed digital reset values; and
pixel value compression circuitry configured to generate compressed digital pixel values based on the decompressed digital reset values and on the digital LD values.

13. The image sensing device of claim 12 ,
wherein the pixel value compression circuitry includes:
CDS subtraction circuitry configured subtract the decompressed digital reset values from the digital LD values to obtain digital pixel values, and
pixel value compression circuitry configured to generate the compressed digital pixel values based on the digital pixel values.

14. The image sensing device of claim 12 ,
wherein the reset value compression circuitry is configured to generate the compressed digital reset values by, for each of digital reset values:
generating a predicted reset value based on a prediction function,
generating a prediction error based on the predicted reset value; and
generating one of the compressed digital reset values based on the prediction error.

15. The image sensing device of claim 14 ,
wherein the reset value compression circuitry further includes: a quantizer configured to generate a quantized prediction error associated with each digital reset value; mapping circuitry configured to map the quantized prediction error to an absolute-value prediction error for each digital reset value; a state update generator configured to generate an encoding parameter based on the absolute-value prediction error; and an encoder configured to encode the absolute-value prediction error based on the encoding parameter to generate the compressed digital reset value for each digital reset value.

16. The image sensing device of claim 12 ,
wherein the reset value compression circuitry further includes rate control circuitry to control a distortion parameter of the reset value compression circuitry based on the total number of data bits of compressed digital reset values being generated.

17. The image sensing device of claim 12 ,
wherein the pixel value compression circuitry further includes rate control circuitry to control a distortion parameter of the pixel value compression circuitry based on the total number of data bits of compressed digital pixel values being generated.

18. The image sensing device of claim 12 ,
wherein the reset value compression circuitry includes a Golomb-Rice encoder.

19. The image sensing device of claim 12 ,
wherein the reset value compression circuitry includes a plurality of encoders in communication with a line buffer, the line buffer being configured to store incoming digital reset values to be compressed, and wherein the reset value compression circuitry is configured to generate in each clock cycle a plurality of the compressed digital reset values corresponding to a plurality of the light sensing elements.

20. The image sensing device of claim 19 ,
wherein the line buffer receives the incoming digital reset values in an array scan ordering, the plurality of encoders are configured to encode the digital reset values stored in the line buffer i

Assignees

• Sony Corp
• Pixim Inc

Inventors

• Wong Ping Wah
• Ayers Thomas R

Classifications

• H04N25/65 Primary

  applied to reset noise, e.g. KTC noise related to CMOS structures by techniques other than CDS · CPC title

• H04N25/616

  involving a correlated sampling function, e.g. correlated double sampling [CDS] or triple sampling · CPC title

• H04N25/772

  comprising A/D, V/T, V/F, I/T or I/F converters · CPC title

• H03M3/342

  by double sampling, e.g. correlated double sampling · CPC title

• H04N5/37455

  Electricity · mapped topic