Negative impedance circuit

Patent metadata

Field	Value
Publication number	US-9813032-B2
Application number	US-201615357863-A
Country	US
Kind code	B2
Filing date	Nov 21, 2016
Priority date	Dec 2, 2015
Publication date	Nov 7, 2017
Grant date	Nov 7, 2017

Abstract

A negative impedance circuit including: a first and a second bipolar transistors having a common collector, a base of the first transistor being connected to an emitter of the second transistor; a third and a fourth bipolar transistors having a common collector, a base of the third transistor being connected with an emitter of the fourth transistor; and at least one first impedance formed of one or of a plurality of passive components coupling the common collector of the first and second transistors to the common collector of the third and fourth transistors, a base of the second transistor being coupled to the collector of the third and fourth transistors and a base of the fourth transistor being coupled to the collector of the first and second transistors.

First claim

What is claimed is:

1. A negative impedance circuit, comprising:
a first and a second bipolar transistors having a common collector, a base of the first transistor being connected to an emitter of the second transistor;
a third and a fourth bipolar transistors having a common collector, a base of the third transistor being connected to an emitter of the fourth transistor;
at least one first impedance formed of one or of a plurality of passive components coupling the common collector of the first and second transistors to the common collector of the third and fourth transistors, a base of the second transistor being coupled to the collector of the third and fourth transistors and a base of the fourth transistor being coupled to the collector of the first and second transistors; and
a second impedance at least inductive or capacitive, formed of one or a plurality of passive components, connecting the bases of the first and third transistors.

2. The circuit of claim 1 , wherein said first impedance is at least inductive or capacitive.

3. The circuit of claim 1 , wherein the emitters of the first and third transistors are respectively connected to terminals of the circuit.

4. The circuit of claim 3 , wherein the connection between the respective emitters of the first and third transistors and said terminals is performed via capacitive decoupling elements.

5. The circuit of claim 1 , wherein capacitive elements respectively connect the base of the second transistor to the common collector of the third and fourth transistors and the base of the fourth transistor to the common collector of the first and second transistors.

6. The circuit of claim 1 , wherein resistive biasing elements individually connect the common collectors of the first and second transistors and the bases of the third and fourth transistors to a terminal of application of a bias voltage.

7. The circuit of claim 1 , wherein the transistors are of PNP type.

8. The circuit of claim 1 , wherein the transistors are of NPN type.

Assignees

• Commissariat à l'Energie Atomique et aux Energies Alternatives

Inventors

• Batel Lotfi
• Pintos Jean-François
• Rudant Lionel

Classifications

• H03H11/52

  simulating negative resistances · CPC title

• H03H11/48

  simulating reactances · CPC title

• H03F2200/165

  A filter circuit coupled to the input of an amplifier · CPC title

• H03F1/565 Primary

  using inductive elements · CPC title

• H03F2200/294

  the amplifier being a low noise amplifier [LNA] · CPC title