Active bootstrapped-supply generator
US-2024429816-A1 · Dec 26, 2024 · US
US9812960B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9812960-B2 |
| Application number | US-201514983227-A |
| Country | US |
| Kind code | B2 |
| Filing date | Dec 29, 2015 |
| Priority date | Dec 29, 2015 |
| Publication date | Nov 7, 2017 |
| Grant date | Nov 7, 2017 |
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Methods and apparatus for DC-DC power controller with low standby current and fast transient response. In an example arrangement, an apparatus includes a voltage converter outputting a direct current output voltage, configured to increase the output voltage responsive to an enable control signal; at least one feedback comparator configured to output a first control signal, the feedback comparator being active responsive to an edge at a clock signal input; an adjustable frequency oscillator for outputting a first clock signal; and a fast transient detect circuit configured to output a second signal asynchronously upon detecting a rapid change greater than a voltage threshold in the output voltage; the voltage converter receiving the enable control signal when either the first clock signal is active, or the second signal is active and the output voltage is less than a reference voltage. Additional apparatus and methods are disclosed.
Opening claim text (preview).
What is claimed is: 1. An apparatus, comprising: a voltage converter coupled to receive a direct current input voltage and produce a direct current output voltage responsive to a converter enable signal; a first comparator configured to produce a first enable signal in response to a first clock signal and a difference between the output voltage and a reference voltage; an adjustable frequency oscillator configured to produce the first clock signal at a frequency determined by a control signal; a fast transient detect circuit configured to produce an asynchronous clock signal upon detecting a rapid change in the output voltage; a second comparator configured to produce a second enable signal in response to the asynchronous clock signal and a difference between the output voltage and the reference voltage; and arbiter circuitry configured to produce the converter enable signal responsive to either of the first enable signal or the second enable signal. 2. The apparatus of claim 1 , wherein the fast transient detect circuit further comprises an output transistor and an input terminal for receiving the output voltage, and wherein the input terminal is coupled to the output transistor by a capacitor for conducting an output voltage transient to the output transistor. 3. The apparatus of claim 1 , wherein the fast transient detect circuit comprises at least one transistor arranged to apply a bias voltage to an output transistor in response to a clock signal. 4. The apparatus of claim 1 , and further comprising a control circuit configured to apply the control signal to the adjustable oscillator to set the frequency of the adjustable frequency oscillator, wherein the control circuit is coupled to receive the converter enable signal and the first clock signal. 5. The apparatus of claim 4 wherein the control circuit further comprises a counter for counting the clock pulses from the oscillator during a period of the first enable signal. 6. The apparatus of claim 5 , wherein the control circuit is configured to decrease the frequency of the oscillator when a number of clock pulses counted is greater than a predetermined maximum. 7. The apparatus of claim 5 , wherein the control circuit is configured to increase the frequency of the oscillator when a number of clock pulses counted is less than a predetermined minimum. 8. A method, comprising: producing a direct current output voltage from a direct current input voltage responsive to a converter enable signal; producing a synchronous clock signal from an adjustable oscillator circuit; producing an asynchronous clock signal from a fast transient detect circuit in response to a change in the output voltage; and selectively producing the converter enable signal in response to either the synchronous clock signal or the asynchronous clock signal from the fast transient detect circuit. 9. The method of claim 8 , comprising: enabling a comparator to compare the direct current output voltage to a reference voltage in response to the synchronous clock signal; and producing the converter enable signal by the comparator in response to the step of enabling. 10. The method of claim 8 , wherein the step of producing an asynchronous clock signal comprises capacitively coupling a change in the direct current output voltage to a transistor of the fast transient detect circuit. 11. The method of claim 8 , and further comprising controlling a frequency of the adjustable oscillator by counting a number of clock cycles between subsequent converter enable signals that occur over a time period. 12. The method of claim 11 , and further comprising comparing the number of clock cycles to a maximum threshold and decreasing the frequency of the adjustable oscillator when the number of clock cycles is greater than the maximum threshold. 13. The method of claim 11 , and further comprising comparing the number of clock cycles to a minimum threshold and increasing the frequency of the adjustable oscillator when the number of clock cycles is less than the minimum threshold. 14. The method of claim 8 , comprising applying a bias voltage to an output transistor of the fast transient detect circuit in response to a clock signal. 15. An integrated circuit, comprising: a converter circuit for converting a direct current input voltage to a direct current output voltage, responsive to a converter enable signal; an adjustable frequency oscillator for providing a synchronous clock signal; a comparator configured to produce the converter enable signal in response to a comparator clock signal and a difference between the output voltage and a reference voltage; a fast transient detect circuit configured to produce an asynchronous clock signal upon detecting a rapid change in the output voltage; and arbiter circuitry configured to produce the comparator clock signal responsive to either of the synchronous clock signal or the asynchronous clock signal. 16. The integrated circuit of claim 15 , wherein the adjustable frequency oscillator and the fast transient detect circuit are always active when the integrated circuit is powered up, and the comparator is active only when it receives the comparator clock signal. 17. The integrated circuit of claim 15 , wherein the fast transient detect circuit comprises an output transistor and an input terminal for receiving the output voltage, and wherein the input terminal is coupled to the output transistor by a capacitor for conducting an output voltage transient to the output transistor. 18. The integrated circuit of claim 15 , wherein the fast transient detect circuit comprises at least one transistor arranged to apply a bias voltage to an output transistor in response to a clock signal. 19. The integrated circuit of claim 15 , comprising a control circuit configured to apply a control signal to the adjustable oscillator to set a frequency of the synchronous clock signal, wherein the control circuit is coupled to receive the converter enable signal and the synchronous clock signal. 20. The integrated circuit of claim 19 wherein the control circuit comprises a counter for counting the clock cycles of the synchronous clock signal and adjusting the frequency of the synchronous clock signal in response to minimum or maximum count thresholds.
including plural semiconductor devices as final control devices for a single load · CPC title
Electricity · mapped topic
with automatic control of output voltage or current, e.g. switching regulators · CPC title
with means for compensating against rapid load changes, e.g. with auxiliary current source, with dual mode control or with inductance variation · CPC title
Control circuits providing compensation of output voltage deviations using feedforward of disturbance parameters · CPC title
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