Memory device incorporating selector element with multiple thresholds

Patent metadata

Field	Value
Publication number	US-9812499-B1
Application number	US-201615221505-A
Country	US
Kind code	B1
Filing date	Jul 27, 2016
Priority date	Jul 27, 2016
Publication date	Nov 7, 2017
Grant date	Nov 7, 2017

Abstract

The present invention is directed to a memory device including a memory cell coupled to two wiring lines at two ends thereof. The memory cell includes a memory element, which includes a magnetic free layer and a magnetic reference layer with a tunnel junction layer interposed therebetween, and a bi-directional two-terminal selector element having multiple threshold voltages coupled to the memory element in series. The magnetic free layer has a variable magnetization direction substantially perpendicular to a layer plane thereof and the magnetic reference layer has a fixed magnetization direction substantially perpendicular to a layer plane thereof. In an embodiment, the bi-directional two-terminal selector element includes two selector devices with each selector device including two electrodes with a switching layer interposed therebetween. In another embodiment, the bi-directional two-terminal selector element includes a selector device incorporating therein two switching layers.

First claim

What is claimed is:

1. A memory device comprising a memory cell coupled to two wiring lines at two ends thereof, said memory cell comprising:
a memory element including a magnetic free layer and a magnetic reference layer with a tunnel junction layer interposed therebetween; and
a bi-directional two-terminal selector element coupled to said memory element in series, said bi-directional two-terminal selector element including two selector devices having different threshold voltages coupled in series.

2. The memory device of claim 1 , wherein said magnetic free layer has a variable magnetization direction substantially perpendicular to a layer plane thereof and said magnetic reference layer has a fixed magnetization direction substantially perpendicular to a layer plane thereof.

3. The memory device of claim 1 , wherein each of said two selector devices includes two electrode layers with a switching layer interposed therebetween.

4. The memory device of claim 3 , wherein said two electrode layers are made of a same material.

5. The memory device of claim 3 , wherein said two electrode layers are made of different materials.

6. The memory device of claim 3 , wherein said switching layers of said two selector devices have different compositions.

7. The memory device of claim 3 , wherein said switching layers of said two selector devices have a same composition but different thicknesses.

8. The memory device of claim 3 , wherein at least one of said switching layers of said two selector devices comprises a chalcogenide or oxide.

9. A memory device comprising a memory cell coupled to two wiring lines at two ends thereof, said memory cell including:
a memory element including a magnetic free layer and a magnetic reference layer with a tunnel junction layer interposed therebetween; and
a bi-directional two-terminal selector element coupled to said memory element in series, said bi-directional two-terminal selector element including at least two switching layers having different threshold voltages and a plurality of electrodes separated by said at least two switching layers.

10. The memory device of claim 9 , wherein said magnetic free layer has a variable magnetization direction substantially perpendicular to a layer plane thereof and said magnetic reference layer has a fixed magnetization direction substantially perpendicular to a layer plane thereof.

11. The memory device of claim 9 , wherein said at least two switching layers have different compositions.

12. The memory device of claim 9 , wherein said at least two switching layers have a same composition but different thicknesses.

13. The memory device of claim 9 , wherein at least one of said at least two switching layers comprises a chalcogenide or oxide.

14. The memory device of claim 9 , wherein said plurality of electrodes have a same composition.

15. The memory device of claim 9 , wherein said plurality of electrodes have different compositions.

Assignees

• Avalanche Technology Inc

Inventors

• Satoh Kimihiro
• Yang Hongxin

Classifications

• H01L27/24 Primary

  Electricity · mapped topic

• H10B63/10

  Phase change RAM [PCRAM, PRAM] devices · CPC title

• H10N70/8828

  Tellurides, e.g. GeSbTe · CPC title

• H10B61/10 Primary

  comprising components having two electrodes, e.g. diodes or MIM elements · CPC title

• H10N70/8833

  Binary metal oxides, e.g. TaOx · CPC title