Process of forming an electronic device including a material defining a void

US9812354B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9812354-B2
Application numberUS-201514713603-A
CountryUS
Kind codeB2
Filing dateMay 15, 2015
Priority dateMay 15, 2015
Publication dateNov 7, 2017
Grant dateNov 7, 2017

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  1. Title

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  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

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Abstract

Official abstract text for this publication.

An electronic device can include one or more trenches that include a material that defines one or more voids. In an embodiment, the substrate defines a first trench having a first portion and a second portion laterally adjacent to the first portion, wherein the first portion has with a first width, the second portion has a second width, and the first width is wider than the second width. The material defines a first void at a predetermined location within the first portion of the first trench and has a seam within the second portion of the first trench. In another embodiment, the substrate defining a trench, and the material that defines spaced-apart voids at predetermined locations within the trench. A process of forming the electronic device can include patterning a substrate to define a trench, and depositing a material within the trench, wherein the deposited material defines a void.

First claim

Opening claim text (preview).

What is claimed is: 1. A process of forming an electronic device comprising: forming a masking layer over a substrate, wherein the masking layer defines a first opening including a first portion having a first width and a second portion having a second width, wherein the first width is wider than the second width; patterning the substrate to define a first trench having a first portion and a second portion corresponding to the first portion and the second portion of the first opening of the masking layer, wherein, as compared to using a different mask having a uniform width corresponding to the second width, during patterning, the first portion of the first trench allows an etchant gas to reach a location at or near a bottom of the first trench more readily, and etch product gas to be removed from the location at or near a bottom of the first trench more readily, or both; and depositing a material within the first trench. 2. The process of claim 1 , wherein depositing the material within the first trench is performed such that, as compared to using a different mask having a uniform width corresponding to the second width, the first portion of the first trench allows a deposition material to reach a location at or near a bottom of the first trench more readily. 3. The process of claim 1 , wherein depositing the material within the first trench is performed such that, as compared to using a different mask having a uniform width corresponding to the second width, the first portion of the trench allows a deposition reactant to reach the location at or near a bottom of the first trench more readily, a deposition product gas to be removed from the location at or near a bottom of the first trench more readily, or both. 4. The process of claim 1 , wherein depositing the material defines a first void within the first trench, and the material has a seam within the second portion. 5. The process of claim 4 , wherein at a highest elevation of the first void, the first void does not have a lateral dimension that is greater than the first width of the first trench. 6. The process of claim 4 , wherein: patterning the substrate is performed such that the first trench includes additional spaced-apart first portions at predetermined locations with additional second portions between the additional spaced-apart first portions; and depositing the material defines additional spaced-apart first voids within the first trench, and the material defines a second void within the additional spaced-apart second portions, wherein the second void is not at a predetermined location. 7. The process of claim 1 , wherein: a first void defined by the material is located within the first portion of the first trench, and from a top view, the first void has one or more lateral dimensions, wherein each of the one or more lateral dimensions of the first void is smaller than the first width; and a second void defined by the material is located within the second portion of the first trench, and from a top view, the second void has one or more lateral dimensions, wherein each of the one or more lateral dimensions of the second void is no greater than 0.3 times each of the one or more lateral dimensions of the first void. 8. The process of claim 1 , further comprising capping the first void with a capping material. 9. The process of claim 8 , wherein capping is performed using a dep-etch-dep technique. 10. The process of claim 1 , wherein: the masking layer defines a second opening, wherein the first opening laterally surrounds the second opening; patterning the substrate further defines a second trench that surrounds the first trench; the process further comprising forming an insulating layer along sidewalls of the first and second trenches before depositing the conductive material; and depositing the material is performed such that the material is deposited in the second trench, wherein the material is conductive. 11. A process of forming an electronic device comprising: forming a masking layer over a substrate, wherein the masking layer defines a first opening including a first portion having a first width and a second portion having a second width, wherein the first width is wider than the second width; patterning the substrate to define a first trench having a first portion and a second portion corresponding to the first portion and the second portion of the first opening of the masking layer; and depositing a material within the first trench, wherein, as compared to using a different mask having a uniform width corresponding to the second width, the deposited material has a reduced likelihood of delaminating from a wall of the trench. 12. The process of claim 11 , wherein the first portion of the first trench is in a range of 10% to 500% wider than the second portion of the first trench. 13. The process of claim 12 , wherein the first portion of the first trench has a width in a range of 0.5 micron to 5.0 microns. 14. The process of claim 11 , wherein: forming the masking layer is performed such that the masking layer defines a second opening; patterning the substrate is performed to form a second trench; and depths of the first and second trenches are within no greater than 20% of each other. 15. The process of claim 14 , wherein at least a portion of the second trench has a width less than the first portion of the first trench. 16. The process of claim 14 , wherein each of the first and second trenches have an aspect ratio of at least 11. 17. The process of claim 14 , wherein each of the first and second trenches has a depth of at least 11 microns. 18. The process of claim 11 , wherein: depositing a material within the first trench is performed such that a first void is formed at a predetermined location within the first portion of the trench; and the process further comprises capping the first void with a capping material. 19. The process of claim 18 , wherein capping is performed such that a second void is formed within the second portion of the trench, wherein the second void has a lateral dimension no greater than 0.3 times the a lateral dimension of the first void. 20. A process of forming an electronic device comprising: forming a masking layer over a substrate, wherein the masking layer defines a opening including a first portion having a first width and a second portion having a second width, wherein the first width is wider than the second width; patterning the substrate to define a trench having a first portion and a second portion corresponding to the first portion and the second portion of the opening of the masking layer, wherein, as compared to using a different mask having a uniform width corresponding to the second width, during patterning, the first portion of the trench allows an etchant gas to reach a location at or near a bottom of the trench more readily, and etch product gas to be removed from the location at or near a bottom of the trench more readily, or both; and depositing a material within the trench, wherein the deposited material defines a void in a predetermined location within the first portion of the trench.

Assignees

Inventors

Classifications

  • comprising use of blind vias during the manufacture · CPC title

  • Top-view shapes · CPC title

  • Coaxial through-semiconductor vias · CPC title

  • characterised by their size, orientation, disposition, behaviour or shape, in horizontal or vertical plane · CPC title

  • by filling conductive material into holes, grooves or trenches · CPC title

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Frequently asked questions

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What does patent US9812354B2 cover?
An electronic device can include one or more trenches that include a material that defines one or more voids. In an embodiment, the substrate defines a first trench having a first portion and a second portion laterally adjacent to the first portion, wherein the first portion has with a first width, the second portion has a second width, and the first width is wider than the second width. The ma…
Who is the assignee on this patent?
Semiconductor Components Ind Llc
What technology area does this patent fall under?
Primary CPC classification H10W20/023. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Nov 07 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).