Wiring board and method for recognizing code information thereof

Patent metadata

Field	Value
Publication number	US-9811693-B2
Application number	US-201615011823-A
Country	US
Kind code	B2
Filing date	Feb 1, 2016
Priority date	Feb 3, 2015
Publication date	Nov 7, 2017
Grant date	Nov 7, 2017

Abstract

A wiring board of the present invention includes an insulating board including a core insulating plate and an insulating layer laminated on at least one surface of the insulating plate. A plurality of code information reading pads formed of a conductor layer are disposed on a surface of the insulating layer formed uppermost. A common conductor is disposed oppositely to the code information reading pads by interposing therebetween the insulating layer formed uppermost. At least one of the code information reading pads and the common conductor are electrically connected to each other through a via conductor penetrating through the insulating layer formed uppermost.

First claim

What is claimed is:

1. A wiring board comprising:
an insulating board comprising a core insulating plate and an insulating layer laminated on at least one surface of the insulating plate,
wherein a plurality of code information reading pads formed of a conductor layer having an inherent code information are disposed on a surface of the insulating layer formed uppermost,
wherein a common conductor is disposed oppositely to the code information reading pads by interposing therebetween the insulating layer formed uppermost, and
wherein at least one of the code information reading pads and the common conductor are electrically connected to each other through a via conductor penetrating through the insulating layer formed uppermost.

2. The wiring board according to claim 1 , wherein a plurality of the insulating layers are laminated on each of both surfaces of the core insulating plate.

3. The wiring board according to claim 1 , wherein a plurality of the code information reading pads not electrically connected to the common conductor are covered with a solder resist layer.

4. The wiring board according to claim 1 , wherein all of the code information reading pads are electrically connected to the common conductor, and at least one of the code information reading pads is covered with a solder resist layer.

5. The wiring board according to claim 1 , wherein the code information reading pad electrically connected to the common conductor differs from the code information reading pad not electrically connected to the common conductor in shape or size.

6. The wiring board according to claim 1 , wherein the code information reading pads are disposed collectively.

7. The wiring board according to claim 1 , wherein the code information reading pads are disposed dispersedly.

8. The wiring board according to claim 1 , wherein a plurality of semiconductor element connection pads to be flip-chip connected to an electrode terminal of a semiconductor element are disposed on the surface of the insulating layer formed uppermost, and a part of the semiconductor element connection pads constitutes the code information reading pads.

9. A method for recognizing a code information comprising:
providing a wiring board including an insulating board,
wherein the insulating board comprises a core insulating plate and an insulating layer laminated on at least one surface of the insulating plate,
wherein a plurality of code information reading pads formed of a conductor layer having an inherent code information are disposed on a surface of the insulating layer formed uppermost,
wherein a common conductor is disposed oppositely to the code information reading pads by interposing therebetween the insulating layer formed uppermost, and
wherein at least one of the code information reading pads and the common conductor are electrically connected to each other through a via conductor penetrating through the insulating layer formed uppermost; and
recognizing code information by detecting presence or absence of an electrical connection between the code information reading pad and the common conductor in the wiring board.

10. A method for recognizing a code information comprising:
providing a wiring board including an insulating board,
wherein the insulating board comprises a core insulating plate and an insulating layer laminated on at least one surface of the insulating plate,
wherein a plurality of code information reading pads formed of a conductor layer having an inherent code information are disposed on a surface of the insulating layer formed uppermost,
wherein a common conductor is disposed oppositely to the code information reading pads by interposing therebetween the insulating layer formed uppermost, and
wherein at least one of the code information reading pads and the common conductor are electrically connected to each other through a via conductor penetrating through the insulating layer formed uppermost;
wherein a plurality of semiconductor element connection pads to be flip-chip connected to an electrode terminal of a semiconductor element are disposed on the surface of the insulating layer formed uppermost, and a part of the semiconductor element connection pads constitute the code information reading pads;
connecting the code information reading pads to the electrode terminal of the semiconductor element in the wiring board; and
recognizing code information by taking presence or absence of an electrical connection between the code information reading pad and the common conductor, into the semiconductor element as data.

Assignees

• Kyocera Circuit Solutions Inc
• Kyocera Corp

Inventors

• Kawashima Takafumi

Classifications

• H10W90/724

  between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

• H05K1/113

  Via provided in pad; Pad over filled via · CPC title

• G06K7/065 Primary

  for conductive marks · CPC title

• H05K1/0268 Primary

  for electrical inspection or testing · CPC title

• H05K1/181

  associated with surface mounted components · CPC title