Back channel support for systems with split lane swap

Patent metadata

Field	Value
Publication number	US-9811487-B2
Application number	US-201313935172-A
Country	US
Kind code	B2
Filing date	Jul 3, 2013
Priority date	Jul 3, 2013
Publication date	Nov 7, 2017
Grant date	Nov 7, 2017

Abstract

Example embodiments may include a method for configuring an interface that includes determining information for a configuration of an interface of a first device including a plurality of SERDES slices having a plurality of connections to a second device over the interface; and configuring a back channel layer associated with the first device to form a back channel path to carry a message between a transmitter and a receiver of the first device based on the configuration of the plurality of connections to the second device. The transmitter can be in a first SERDES slice of the plurality of SERDES slices and the receiver is in a second SERDES slice of the plurality of SERDES slices.

First claim

What is claimed is:

1. A method, comprising:
determining information for a configuration of an interface of a first crossbar switch including a plurality of serializer/deserializer (SERDES) slices having a plurality of connections to a second crossbar switch over the interface;
configuring a back channel layer associated with the first crossbar switch to form a back channel path to carry a first message to a first transmitter from a first receiver of the first crossbar switch based on a configuration of the plurality of connections to the second crossbar switch, wherein the first transmitter is in a first SERDES slice of the plurality of SERDES slices, and the first SERDES slice is assigned a lane ID;
receiving, at the first receiver, a second message on a serial link, wherein the first receiver is in a second SERDES slice of the plurality of SERDES slices, and the back channel layer inserts a recipient ID in the second message to produce the first message; and
determining, with an interface layer, whether the recipient ID in the first message matches the lane ID, wherein the interface layer interfaces to the first SERDES slice.

2. The method of claim 1 , further comprising:
tuning the first transmitter by receiving a command forwarded from the first receiver over the back channel path.

3. The method of claim 1 , wherein the first transmitter and the first receiver are coupled to a second receiver and a second transmitter, respectively, over the interface, the second receiver and the second transmitter being in a same SERDES slice of the second crossbar switch, and the method further comprises:
receiving a message sent by the second transmitter over the interface at the first receiver, wherein the message sent by the second transmitter comprises a command message generated by the second receiver.

4. The method of claim 1 , wherein the configuring comprises configuring a back channel mapping layer to form the back channel path to carry messages between the first transmitter and the first receiver.

5. The method of claim 1 , wherein the configuring comprises configuring a back channel bus by assigning the recipient ID to the second SERDES slice, and the recipient ID identifies the first SERDES slice.

6. The method of claim 1 , wherein the configuring comprises configuring a daisy chain back channel bus.

7. An apparatus, comprising:
a first slice of a plurality of serializer/deserializer (SERDES) slices, wherein the first slice includes a first transmitter, and the first slice is assigned a lane ID;
an interface layer that interfaces to the first slice, wherein the interface layer is configured to determine whether a recipient ID in a first message matches the lane ID;
a second slice of the plurality of SERDES slices, wherein the second slice includes a first receiver configured to receive a second message on a serial link; and
a back channel layer configured to insert the recipient ID in the second message to produce the first message and to form a back channel path to carry the first message from the first receiver to the first transmitter.

8. The apparatus of claim 7 , wherein the back channel layer comprises a mapping layer.

9. The apparatus of claim 8 , wherein the mapping layer comprises a programmable multiplexing layer.

10. The apparatus of claim 7 , wherein the back channel layer comprises a daisy chain back channel bus.

11. The apparatus of claim 10 , wherein the daisy chain back channel bus comprises a plurality of interface layers coupled together in a daisy chain configuration, and each of the plurality of interface layers is coupled to a corresponding SERDES slice of the plurality of SERDES slices.

12. The apparatus of claim 11 , wherein each of the plurality of interface layers and the second slice are associated with a lane ID and a recipient ID.

13. The apparatus of claim 7 , wherein the apparatus comprises a first SERDES device and a second SERDES device, and the first transmitter and the first receiver are coupled to a second receiver and a second transmitter, respectively, of the second SERDES device over an interface, the second receiver and the second transmitter being in a same SERDES slice of the second SERDES device.

14. The apparatus of claim 13 , wherein the second message comprises a command message from the second receiver directed to the first transmitter.

15. The apparatus of claim 7 , wherein the apparatus is further configured to:
determine information for a configuration of an interface, wherein the plurality of SERDES slices have a plurality of connections to a SERDES device over the interface; and
configure the back channel layer based on a configuration of the plurality of connections to the SERDES device.

16. Non-transitory media encoded with logic that includes instructions for execution and, when executed by a processor, is operable to perform operations comprising:
determining information for a configuration of an interface of a first crossbar switch including a plurality of serializer/deserializer (SERDES) slices having a plurality of connections to a second crossbar switch over the interface;
configuring a back channel layer of the first crossbar switch to form a back channel path to carry a first message to a transmitter from a receiver of the first crossbar switch based on a configuration of the plurality of connections to the second crossbar switch, wherein the transmitter is in a first SERDES slice of the plurality of SERDES slices, and the first SERDES slice is assigned a lane ID;
receiving, at the receiver, a second message on a serial link, wherein the receiver is in a second SERDES slice of the plurality of SERDES slices, and the back channel layer inserts a recipient ID in the second message to produce the first message; and
determining, with an interface layer, whether the recipient ID in the first message matches the lane ID, wherein the interface layer interfaces to the first SERDES slice.

17. The media of claim 16 , wherein the operations further comprise:
configuring a back channel mapping layer to form the back channel path to carry messages between the transmitter and the receiver.

18. The media of claim 16 , wherein the operations further comprise:
configuring a back channel bus and assigning a recipient ID to the second SERDES slice, wherein the recipient ID identifies the first SERDES slice.

19. The method of claim 1 , wherein the second crossbar switch comprises at least one SERDES slice comprising a second transmitter and a second receiver, the information indicating that the first transmitter and the first receiver are coupled to the second receiver and the second transmitter, respectively, over the interface.

20. The apparatus of claim 7 , wherein the first transmitter is tuned by receiving a command in the second message forwarded from the first receiver over the back channel path.

Assignees

• Cisco Tech Inc

Inventors

• Nagarajan Srividhya
• Cheng Wei-Min
• Kumar Lalit
• Mayya Deepak S

Classifications

• G06F13/4022 Primary

  using switching circuits, e.g. switching matrix, connection or expansion network (G06F13/4009 takes precedence) · CPC title

• H04L25/14 Primary

  Channel dividing arrangements {, i.e. in which a single bit stream is divided between several baseband channels and reassembled at the receiver} · CPC title

• G06F13/37

  using a physical-position-dependent priority, e.g. daisy chain, round robin or token passing · CPC title