Charge pump based over-sampling ADC for current detection

Patent metadata

Field	Value
Publication number	US-9810723-B2
Application number	US-201213628465-A
Country	US
Kind code	B2
Filing date	Sep 27, 2012
Priority date	Sep 27, 2012
Publication date	Nov 7, 2017
Grant date	Nov 7, 2017

Abstract

Techniques are presented for determining current levels based on the behavior of a charge pump system while driving a load under regulation. While driving the load under regulation, the number of pump clocks during a set interval is counted. This can be compared to a reference that can be obtained, for example, from the numbers of cycles needed to drive a known load current over an interval of the duration. By comparing the counts, the amount of current being drawn by the load can be determined. This technique can be applied to determining leakage from circuit elements, such as word lines in a non-volatile memory.

First claim

It is claimed:

1. A method, comprising:
supplying a component of an integrated circuit from a charge pump system, the charge pump system including a charge pump having an output connected to drive the component, and regulation circuitry connected to receive the output of the charge pump and regulate the charge pump by varying a frequency of an oscillator supplied to the charge pump;
while driving the component under regulation, determining a number of cycles of the oscillator supplied to the charge pump during an interval of a first duration in order to maintain the output of the charge pump under regulation;
comparing the determined number of cycles to a reference value; and
based upon the comparing, determining an amount of current being drawn by the component.

2. The method of claim 1 , wherein determining the amount of current being drawn by the component comprises converting the number cycles relative to the reference value to a current value.

3. The method of claim 1 , further comprising:
based upon the amount of current being drawn by the component, determining whether the component is leaking.

4. The method of claim 3 , wherein the comparing includes determining whether the number of cycles exceeds the reference value.

5. The method of claim 4 , wherein the reference value is determined as part of a calibration process.

6. The method of claim 5 , wherein the calibration process is performed as part of a test process.

7. The method of claim 1 , wherein the reference value is determined by the number of cycles of the oscillator supplied to the charge pump during an interval of a second duration in order to maintain the output of the charge pump under regulation while driving junction circuitry by which the component is connected to the charge pump, but not driving the component.

8. The method of claim 7 , wherein the first and second durations are the same.

9. The method of claim 7 , wherein the first and second durations differ.

10. The method of claim 1 , wherein the first duration is of a fixed value.

11. The method of claim 1 , further comprising:
prior to supplying the component from the charge pump system, connecting the component to be driven as a load for the charge pump.

12. The method of claim 1 , wherein the integrated circuit includes a non-volatile memory array.

13. The method of claim 12 , wherein the component is a word line of the memory array.

14. The method of claim 13 , wherein the current is an amount of leakage from the word line.

15. The method of claim 1 , wherein the integrated circuit includes a DRAM memory array.

16. The method of claim 15 , wherein the current is an amount of background leakage of the DRAM memory array.

17. The method of claim 1 , wherein the charge pump is a negative voltage charge pump.

18. The method of claim 1 , wherein the component is one of a plurality of components on the integrated circuit and the reference value is determined by the number of cycles of the oscillator supplied to the charge pump during an interval of the first duration in order to maintain the output of the charge pump under regulation while driving another one of the components.

19. The method of claim 1 , wherein the charge pump system is arranged so that the number of cycles of the oscillator supplied to the charge pump during an interval of the first duration in order to maintain the output of the charge pump under regulation when the component is not leaking is ten.

20. An integrated circuit including:
a circuit component;
a charge pump system, including:
a charge pump; and
regulation circuitry connected to receive an output of the charge pump and regulate the charge pump by varying a frequency of an oscillator supplied to the charge pump; connection circuitry, whereby the output of the charge pump is connectable to drive the circuit component as a load; and
current detection circuitry connectable to the charge pump system to determine a number of cycles of the oscillator supplied to the charge pump during an interval of a first duration in order to maintain the output of the charge pump under regulation and, from the determined number of cycles, to determine an amount of current being drawn by the component.

21. The integrated circuit of claim 20 , wherein the current detection circuitry determines the amount of current being drawn based upon comparing the determined number of cycles to a reference value and converting the number of cycles relative to the reference value to a current value.

22. The integrated circuit of claim 20 , wherein based upon the amount of current being drawn by the circuit component, the current detection circuitry determines whether the circuit component is leaking.

23. The integrated circuit of claim 20 , wherein the current detection circuitry determines the amount of current being drawn by the component by comparing the determined number of cycles to a reference value and, based upon the comparing, determining the amount of current being drawn by the circuit component.

24. The integrated circuit of claim 23 , wherein the comparing includes determining whether the number of cycles exceeds the reference value.

25. The integrated circuit of claim 20 , wherein the first duration is of a fixed value.

26. The integrated circuit of claim 20 , wherein the integrated circuit includes a non-volatile memory array.

27. The integrated circuit of claim 26 , wherein the circuit component is a word line of the memory array.

28. The integrated circuit of claim 20 , wherein the integrated circuit includes a DRAM memory array.

29. The integrated circuit of claim 28 , wherein the current is an amount of background leakage of the DRAM memory array.

30. The integrated circuit of claim 20 , wherein the charge pump is a negative voltage charge pump.

Assignees

• Sandisk Technologies Llc

Inventors

• Pan Feng
• Wang Jun
• Guhados Shankar
• Lei Bo

Classifications

• G01R19/0092 Primary

  Measuring current only · CPC title

• G11C2029/1202

  Word line control · CPC title

• G11C29/025

  in signal lines · CPC title

• G11C2029/5006

  Current · CPC title