Capacitive sensing structure with embedded acoustic channels

US9809451B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9809451-B2
Application numberUS-201514942969-A
CountryUS
Kind codeB2
Filing dateNov 16, 2015
Priority dateJun 5, 2013
Publication dateNov 7, 2017
Grant dateNov 7, 2017

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A MEMS device includes a dual membrane, an electrode, and an interconnecting structure. The dual membrane has a top membrane and a bottom membrane. The bottom membrane is positioned between the top membrane and the electrode and the interconnecting structure defines a spacing between the top membrane and the bottom membrane.

First claim

Opening claim text (preview).

What we claim is: 1. A method of manufacturing a micro-electro-mechanical system (MEMS) device comprising: forming an electrode on top of a complementary metal-oxide-semiconductor (CMOS) wafer; forming a moveable dual-plate membrane with top and bottom membranes on top of the electrode, the moveable dual plate membrane forming a MEMS device wafer; forming an interconnecting structure, wherein the moveable dual-plate membrane and the interconnecting structure create a MEMS on the MEMS device wafer, the interconnecting structure being positioned between the top and bottom membranes and bonding the CMOS wafer to the MEMS device wafer and causing electrical connection between the CMOS wafer and the MEMS device wafer, the interconnecting structure electrically connecting the top and the bottom membranes. 2. The method of claim 1 , wherein the bonding comprises eutectic bonding. 3. The method of claim 1 , further including forming standoffs on the MEMS wafer. 4. The method of claim 1 , further including depositing polysilicon on the MEMS wafer before forming the standoffs. 5. The method of claim 1 , further including forming standoffs between the bottom membrane and the electrode, the standoffs electrically connecting the bottom membrane and the electrode. 6. The method of claim 1 , further including thinning the CMOS wafer. 7. The method of claim 1 , wherein the forming the moveable dual-plate membrane comprising forming a top membrane and a bottom membrane. 8. The method of claim 7 , further including forming perforations in the bottom membrane. 9. The method of claim 1 , further including bonding a handle wafer on top of the moveable dual-plate membrane, the handle wafer including at least one acoustic port. 10. The method of claim 1 , further including creating the interconnecting structure from a single crystal silicon pillar structure left over from partially consumed silicon pillars. 11. The method of claim 1 , wherein the bottom membrane is made of a conductive material. 12. The method of claim 1 , wherein the electrode is made of aluminum. 13. The method of claim 3 , wherein the bonding step includes bonding the CMOS wafer and the MEMS device wafer by aluminum-germanium eutectic bonds through the standoff. 14. The method of claim 3 , wherein the standoff is made of conductive material and a thickness of the standoff defines an electrical sensing gap between the electrode and the bottom membrane. 15. The method of claim 3 , wherein the interconnecting structure is anchored through bonding to the electrode. 16. The method of claim 3 , wherein the top electrode, the interconnecting structure, and the bottom membrane move up and down together, causing a gap formed between the bottom membrane and the electrode to change accordingly. 17. The method of claim 1 , further including forming more than one interconnecting structure between the top and bottom membranes. 18. The method of claim 1 , wherein a change of acoustic pressure causing the top membrane to move downwardly toward or upwardly away from the electrode. 19. The method of claim 1 , wherein a pressure differential is formed on a left side of the top membrane by a pressure difference between a pressure on a left side of the interconnecting structure and a top of the top membrane and a pressure on the left side of the interconnecting structure and a bottom of the top membrane, while a pressure differential on a right side of the top membrane is formed by a pressure difference between a pressure on the right side of the interconnecting structure and the top of the top membrane and the pressure on the right side of the interconnecting structure and the bottom of the top membrane.

Assignees

Inventors

Classifications

  • Pressure sensors · CPC title

  • Interconnects · CPC title

  • B81B3/0086Primary

    Electrical characteristics, e.g. reducing driving voltage, improving resistance to peak voltage · CPC title

  • Soldering · CPC title

  • Microphones (H04R19/01 takes precedence) · CPC title

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Frequently asked questions

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What does patent US9809451B2 cover?
A MEMS device includes a dual membrane, an electrode, and an interconnecting structure. The dual membrane has a top membrane and a bottom membrane. The bottom membrane is positioned between the top membrane and the electrode and the interconnecting structure defines a spacing between the top membrane and the bottom membrane.
Who is the assignee on this patent?
Invensense Inc
What technology area does this patent fall under?
Primary CPC classification B81B3/0086. Mapped technology areas include Operations & Transport.
When was this patent published?
Publication date Tue Nov 07 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).