Circuit and method for converting analog signal to digital value representation

Patent metadata

Field	Value
Publication number	US-9806737-B2
Application number	US-201615369777-A
Country	US
Kind code	B2
Filing date	Dec 5, 2016
Priority date	Dec 16, 2015
Publication date	Oct 31, 2017
Grant date	Oct 31, 2017

Abstract

A circuit and a method for converting an analog signal to a digital value representation is disclosed. In one aspect, the circuit includes an incremental sigma-delta analog-to-digital converter (ADC). The circuit further includes a first input line for providing a primary analog signal representing a sensor measurement to the incremental sigma-delta ADC. The circuit further includes a second input line for providing a secondary analog signal to the incremental sigma-delta ADC. The incremental sigma-delta ADC receives the primary and secondary analog signals during a first period (T ADC1 ) and a second period (T ADC2 ), respectively. The circuit further includes a filter configured to weight the digital values in a sequence of digital values output by the incremental sigma-delta ADC, and to output a single digital value representing the sensor measurement.

First claim

What is claimed is:

1. A circuit for converting an analog signal to a digital value representation, comprising:
an incremental sigma-delta analog-to-digital converter (ADC) having an input for receiving the analog signal and an output for outputting a sequence of digital values corresponding to samples of the received analog signal;
a first input line for providing a primary analog signal representing a sensor measurement to the input of the incremental sigma-delta ADC;
a second input line for providing a secondary analog signal to the input of the incremental sigma-delta ADC,
wherein the input of the incremental sigma-delta ADC receives the primary analog signal from the first input line during a first period of analog-to-digital conversion and receives the secondary analog signal from the second input line during a second period of analog-to-digital conversion; and
a filter configured to receive the sequence of digital values from the incremental sigma-delta ADC, to weight the digital values in the sequence of digital values and to output a single digital value representing the sensor measurement, wherein the second period is at least partly overlapping with a third period during which a voltage representing the sensor measurement settles.

2. The circuit of claim 1 , wherein the circuit is configured to switch the input of the incremental sigma-delta ADC from the first input line to the second input line in synchronization with a start of the third period.

3. The circuit of claim 1 , further comprising at least one input switch for controlling which of the first input line and the second input line is connected to the input of the incremental sigma-delta ADC.

4. The circuit of claim 3 , further comprising a controller for controlling the at least one input switch.

5. The circuit of claim 1 , wherein the secondary analog signal is a constant reference signal.

6. The circuit of claim 1 , wherein the secondary analog signal is a periodic signal, wherein an integral over a full period of the periodic signal is predictable, and wherein the second period of analog-to-digital conversion equals an integer number of periods of the periodic signal.

7. The circuit of claim 1 , further comprising a signal storing component arranged to receive and store the primary analog signal, wherein the signal storing component is connected to the second input line for providing a secondary analog signal which is a copy of the primary analog signal to the input of the incremental sigma-delta ADC.

8. An imaging device, comprising:
a plurality of pixels, which are each arranged to convert incoming light to a primary analog signal representing detected light in the respective pixels, wherein the plurality of pixels are connected to a plurality of circuits according to claim 1 for providing the primary analog signals as input to the first input lines, wherein the plurality of circuits are arranged for converting the received primary analog signals to digital values representing detected light in the respective pixels, wherein the plurality of circuits are arranged for parallel handling of columns of pixels, each circuit being connected to a column line for transferring primary analog signals representing detected light in pixels of the column, wherein primary analog signals from a row of pixels are simultaneously output to the plurality of circuits from the column lines and wherein the second period of analog-to-digital conversion of the plurality of circuits is at least partly overlapping with a time during which the column lines settle to voltages representing detected light on a next row of pixels.

9. A method for converting an analog signal to a digital value representation, comprising:
inputting a primary analog signal representing a sensor measurement to an incremental sigma-delta analog-to-digital converter (ADC) during a first period of analog-to-digital conversion;
inputting a secondary analog signal to the incremental sigma-delta ADC during a second period of analog-to-digital conversion following the first period;
outputting, by the incremental sigma-delta ADC, a sequence of digital values corresponding to samples of the received primary analog signal and secondary analog signal;
weighting the sequence of digital values to output a single digital value representing the sensor measurement, wherein the second period is at least partly overlapping with a third period during which a voltage representing the sensor measurement settles.

10. The method of claim 9 , further comprising switching input to the incremental sigma-delta ADC from the primary analog signal to the secondary analog signal in synchronization with a start of the third period.

11. The method of claim 9 , wherein the primary analog signal is received on a first input line to the incremental sigma-delta ADC and wherein the secondary signal is received on a second input line to the incremental sigma-delta ADC.

12. The method of claim 11 , further comprising switching input to the incremental sigma-delta ADC by controlling which of the first input line and the second input line is connected to the incremental sigma-delta ADC, said switching controlling a transition from the first period to the second period.

Assignees

• Imec Vzw

Inventors

• Craninckx Jan
• Borremans Jonathan
• De Bock Maarten

Classifications

• H03M1/00

  Analogue/digital conversion; Digital/analogue conversion (conversion of analogue values to or from differential modulation H03M3/00) · CPC title

• H03M3/322

  Continuously compensating for, or preventing, undesired influence of physical parameters (periodically, e.g. by using stored correction values, H03M3/378) · CPC title

• H03M3/30

  Delta-sigma modulation · CPC title

• H03M1/365

  the voltage divider being a single resistor string · CPC title

• H03M1/12

  Analogue/digital converters ({H03M1/001 – } H03M1/10 take precedence) · CPC title