Semiconductor device

Patent metadata

Field	Value
Publication number	US-9806035-B2
Application number	US-201615236143-A
Country	US
Kind code	B2
Filing date	Aug 12, 2016
Priority date	Nov 27, 2003
Publication date	Oct 31, 2017
Grant date	Oct 31, 2017

Abstract

A non-leaded semiconductor device comprises a sealing body for sealing a semiconductor chip, a tab in the interior of the sealing body, suspension leads for supporting the tab, leads having respective surfaces exposed to outer edge portions of a back surface of the sealing body, and wires connecting pads formed on the semiconductor chip and the leads. End portions of the suspension leads positioned in an outer periphery portion of the sealing body are unexposed to the back surface of the sealing body, but are covered with the sealing body. Stand-off portions of the suspending leads are not formed in resin molding. When cutting the suspending leads, corner portions of the back surface of the sealing body are supported by a flat portion of a holder portion in a cutting die having an area wider than a cutting allowance of the suspending leads, whereby chipping of the resin is prevented.

First claim

What is claimed is:

1. A semiconductor device, comprising:
a chip mounting portion having a first surface and a second surface opposite to the first surface;
a semiconductor chip mounted on the first surface of the chip mounting portion;
a plurality of suspension leads connected to the chip mounting portion, each of the plurality of suspension leads having a third surface located on the same side as the first surface of the chip mounting portion, and a fourth surface opposite to the third surface;
a plurality of leads arranged around the chip mounting portion in plan view, each of the plurality of leads having a fifth surface located on the same side as the first surface of the chip mounting portion, and a sixth surface opposite to the fifth surface;
a plurality of wires electrically connecting a plurality of pads of the semiconductor chip with the plurality of leads, respectively; and
a sealing body sealing the semiconductor chip and the plurality of wires, the sealing body having a top surface and a bottom surface opposite to the top surface,
wherein, in cross-section view, the first surface of the chip mounting portion is located between the top surface of the sealing body and the second surface of the chip mounting portion,
wherein, in plan view, a shape of the bottom surface is comprised of quadrangle having sides and corner portions,
wherein the plurality of suspension leads extend from the chip mounting portion toward the corner portions, respectively,
wherein the plurality of suspension leads have end portions located at the corner portions, respectively,
wherein each of the plurality of leads has a first portion and a second portion,
wherein, in cross-section view, a thickness of the second portion is less than a thickness of the first portion,
wherein the sixth surface of the second portion of each of the plurality of leads is covered with the sealing body,
wherein the sixth surface of the first portion of each of the plurality of leads is exposed from the bottom surface of the sealing body,
wherein a thickness of each of the end portions of the plurality of suspension leads is less than the thickness of the first portion of each of the plurality of leads,
wherein the fourth surface of each of the end portions of the plurality of suspension leads is covered with the sealing body,
wherein the plurality of suspension leads include a first suspension lead, a second suspension lead, a third suspension lead, and a fourth suspension lead,
wherein the plurality of leads include a first group of leads arranged along a first one of the sides and also arranged between the first suspension lead and the second suspension lead, a second group of leads arranged along a second one of the sides and also arranged between the second suspension lead and the third suspension lead, a third group of leads arranged along a third one of the sides and also arranged between the third suspension lead and the fourth suspension lead, and a fourth group of leads arranged along a fourth one of the sides and also arranged between the fourth suspension lead and the first suspension lead,
wherein the first group of leads has a first lead arranged next to the first suspension lead, a second lead arranged next to the second suspension lead, and a third lead arranged between the first lead of the first group and the second lead of the first group,
wherein the second group of leads has a first lead arranged next to the second suspension lead, a second lead arranged next to the third suspension lead, and a third lead arranged between the first lead of the second group and the second lead of the second group,
wherein the third group of leads has a first lead arranged next to the third suspension lead, a second lead arranged next to the fourth suspension lead, and a third lead arranged between the first lead of the third group and the second lead of the third group,
wherein the fourth group of leads has a first lead arranged next to the fourth suspension lead, a second lead arranged next to the first suspension lead, and a third lead arranged between the first lead of the fourth group and the second lead of the fourth group,
wherein the sixth surface of the first portion of each of the first lead of the first group and the second lead of the fourth group has a first chamfered portion along the first suspension lead, the sixth surface of the first portion of each of the first lead of the second group and the second lead of the first group has a second chamfered portion along the second suspension lead, the sixth surface of the first portion of each of the first lead of the third group and the second lead of the second group has a third chamfered portion along the third suspension lead, and the sixth surface of the first portion of each of the first lead of the fourth group and the second lead of the third group has a fourth chamfered portion along the fourth suspension lead, and
wherein the first chamfered portion of the first lead of the first group and the first chamfered portion of the second lead of the fourth group face each other,
wherein the second chamfered portion of the first lead of the second group and the second chamfered portion of the second lead of the first group face each other,
wherein the third chamfered portion of the first lead of the third group and the third chamfered portion of the second lead of the second group face each other,
wherein the fourth chamfered portion of the first lead of the fourth group and the fourth chamfered portion of the second lead of the third group face each other, and
wherein a part of the second surface of the chip mounting portion is exposed from the bottom surface of the sealing body.

2. The semiconductor device according to claim 1 , wherein the sixth surface of the first portion of each of the plurality of leads is covered with a plating layer.

3. The semiconductor device according to claim 2 , wherein the plating layer is comprised of solder or palladium.

4. The semiconductor device according to claim 1 , wherein, in plan view, the second portion extends obliquely from the first portion.

5. The semiconductor device according to claim 4 , wherein the plurality of wires are electrically connected with the plurality of leads, respectively, at the second portions of the plurality of leads.

6. A semiconductor device, comprising:
a chip mounting portion having a first surface, and a second surface opposite to the first surface;
a semiconductor chip mounted on the first surface of the chip mounting portion;
a plurality of suspension leads connected to the chip mounting portion, each of the plurality of suspension leads having a third surface located on the same side as the first surface of the chip mounting portion, and a fourth surface opposite to the third surface;
a plurality of leads arranged around the chip mounting portion in plan view, each of the plurality of leads having a fifth surface located on the same side as the first surface of the chip mounting portion, and a sixth surface opposite to the fifth surface;
a plurality of wires electrically connecting a plurality of pads of the semiconductor chip with the plurality of leads, respectively; and
a sealing body sealing the semiconductor chip and the plurality of wires, the sealing body having a top surface and a bottom surface opposite to the top surface,
wherein, in cross-section view, the first surface of the chip mounting portion is located between the top surface of the sealing body and the second surface of the chip mounting portion,
wherein, in plan view, a shape of the bottom surface is comprised of a quadrangle having sides and corner portions,
wherein the plurality of suspension leads extend from the chip mounting portion toward the corner portions, respectively,
wherein t

Assignees

• Renesas Electronics Corp

Inventors

• Danno Tadatoshi
• Taya Hiroyoshi
• Shimizu Yoshiharu

Classifications

• H10P72/0448

  Apparatus for applying a liquid, a resin, an ink or the like · CPC title

• H10P72/0446

  Apparatus for mounting on conductive members, e.g. leadframes or conductors on insulating substrates · CPC title

• H10P54/00

  Cutting or separating of wafers, substrates or parts of devices · CPC title

• H10W90/756

  between a chip and a stacked lead frame, conducting package substrate or heat sink · CPC title

• H10W90/736

  between a chip and a stacked lead frame, conducting package substrate or heat sink · CPC title