Address recognition apparatus, sorting apparatus, integrated address recognition apparatus and address recognition method

US9805062B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9805062-B2
Application numberUS-201514834760-A
CountryUS
Kind codeB2
Filing dateAug 25, 2015
Priority dateAug 28, 2014
Publication dateOct 31, 2017
Grant dateOct 31, 2017

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

An address recognition apparatus has an address recognition section, and a non-addressee determination section. The address recognition section acquires, based on an image of an object, address information described on the object. The non-addressee determination section determines, based on a comparison result of information relating to first address information that is the address information acquired in the address recognition section at a desired timing, and information relating to second address information that is the address information acquired in the address recognition section before the first address information, whether or not the first address information is a non-destination address that is not an address of an addressee.

First claim

Opening claim text (preview).

What is claimed is: 1. An address recognition apparatus, comprising: circuitry configured to acquire, based on an image of an object, address information provided on the object, determine, based on a comparison result of information relating to first address information on the object acquired at a desired timing, and information relating to second address information acquired before the first address information, whether or not the first address information on the object acquired after the second address information is a non-destination address that is not an address of an addressee, the determining including determining, based on comparison results of a plurality of the first address information respectively acquired from a plurality of areas of the object and a plurality of the second address information, whether or not each of the first address information is the non-destination address, determine whether or not each said first address information that is not the non-destination address is a candidate for the address of the addressee, and determine the address of the addressee by analyzing each said candidate for the address of the addressee without analysis of each said first address information determined to be the non-destination address, wherein, in a first case of only one said candidate for the address of addressee, the determining the address of the addressee determines said only one candidate is the address of the addressee, and in a second case of multiple said candidates for the address of the addressee, the determining the address of the addressee determines that one of the candidates having a highest correlation order is the address of the addressee. 2. The address recognition apparatus according to claim 1 , wherein: the circuitry determines that the first address information is the non-destination address when the first address information and the second address information coincide with each other. 3. The address recognition apparatus according to claim 1 , wherein: the circuitry determines that the first address information is the non-destination address when a description position where the first address information is provided on the object and a description position associated with where the second address information is provided coincide with each other. 4. The address recognition apparatus according to claim 1 , wherein: the circuitry determines that the first address information is the non-destination address when an image of a periphery of an address area where the first address information is provided on the object and an image of a periphery of an address area associated with where the second address information is provided are similar. 5. The address recognition apparatus according to claim 1 , wherein: the circuitry is configured to determine that the address information is not the non-destination address when the address information is handwritten. 6. The address recognition apparatus according to claim 1 , wherein: the circuitry determines whether or not the first address information is the non-destination address based on a comparison result of the information relating to the first address information and the information relating to a plurality of the second address information which are respectively acquired from different objects. 7. The address recognition apparatus according to claim 1 , wherein: the circuitry determines that the first address information is the non-destination address when a plurality of the comparison results that the first address information is determined to be the non-destination address exist, based on comparison results of the information relating to the first address information and the information relating to a plurality of the second address information. 8. The address recognition apparatus according to claim 1 , wherein: the circuitry determines whether or not the first address information is the non-destination address, in accordance with a proportion of comparison results that the first address information is determined to be the non-destination address and comparison results that the first address information is determined to be not the non-destination address, out of a plurality of comparison results obtained continuously. 9. The address recognition apparatus according to claim 1 , wherein: the circuitry is configured to store information relating to the address information which has been determined to be the non-destination address, and the circuitry determines whether or not the first address information is the non-destination address, based on a comparison result of the information relating to the stored address information and the information relating to the first address information. 10. The address recognition apparatus according to claim 9 , wherein: the circuitry is configured to accept an editing command to edit information relating to the address of the non-destination address. 11. The address recognition apparatus according to claim 1 , wherein: the circuitry outputs address information determined to be not the non-destination address, out of the acquired address information. 12. The address recognition apparatus according to claim 1 , further comprising: a camera configured to capture the address information provided on the object, wherein the circuitry acquires the address information based on an image captured by the camera. 13. A sorting apparatus, comprising: the address recognition apparatus according to claim 1 ; and a sorting mechanism which sorts the object in accordance with a destination of the object based on address information determined to be not the non-destination address. 14. An integrated address recognition apparatus, comprising: the address recognition apparatus according to claim 1 ; and communication circuitry configured to communicate with a plurality of sorting apparatuses, each of which has a camera configured to capture the address information provided on the object, and sort the object in accordance with a destination of the object, based on information determined to be not the non-destination address by the address recognition apparatus, receive images which the cameras have captured from the plurality of the sorting apparatuses, and transmit a determination result of the address recognition apparatus to at least one of the plurality of the sorting apparatuses. 15. An address recognition method, comprising: acquiring, based on an image of an object, address information provided on the object; determining, based on a comparison result of information relating to first address information on the object acquired at a desired timing, and information relating to second address information acquired before the first address information, whether or not the first address information on the object acquired after the second address information is a non-destination address that is not an address of an addressee, the determining including determining, based on comparison results of a plurality of the first address information respectively acquired from a plurality of areas of the object and a plurality of the second address information, whether or not each of the first address information is the non-destination address; determining whether or not each said first address information that is not the non-destination address is a candidate for the address of the addressee; and determining the address of the addressee by analyzing each said candidate for the address of the addressee without analysis of each said first address information determined to be the non-destination address, w

Assignees

Inventors

Classifications

  • G06V30/424Primary

    Postal images, e.g. labels or addresses on parcels or postal envelopes · CPC title

  • Selective acquisition, locating or processing of specific regions, e.g. highlighted text, fiducial marks or predetermined fields · CPC title

  • using extracted text · CPC title

  • Aspects of pattern recognition specially adapted for signal processing · CPC title

  • Determining representative reference patterns, e.g. by averaging or distorting; Generating dictionaries · CPC title

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What does patent US9805062B2 cover?
An address recognition apparatus has an address recognition section, and a non-addressee determination section. The address recognition section acquires, based on an image of an object, address information described on the object. The non-addressee determination section determines, based on a comparison result of information relating to first address information that is the address information …
Who is the assignee on this patent?
Toshiba Kk
What technology area does this patent fall under?
Primary CPC classification G06V30/424. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Oct 31 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).