Method of manufacturing a patterned conductor

US9801284B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9801284-B2
Application numberUS-201514944811-A
CountryUS
Kind codeB2
Filing dateNov 18, 2015
Priority dateNov 18, 2015
Publication dateOct 24, 2017
Grant dateOct 24, 2017

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A method of manufacturing a patterned conductor is provided, comprising: providing a substrate, comprising: a base material with an electrically conductive layer disposed thereon; providing an electrically conductive layer etchant; providing a spinning material, comprising: a carrier; and, a photosensitive masking material; providing a developer; forming a plurality of masking fibers and depositing them onto the electrically conductive layer to form a plurality of deposited fibers; patterning the plurality of deposited fibers to provide a treated fiber portion and an untreated fiber portion; developing the plurality of deposited fibers, wherein either the treated fiber portion or the untreated fiber portion is removed, leaving a patterned fiber array; contacting the electrically conductive layer to the electrically conductive layer etchant, wherein the electrically conductive layer that is uncovered by the patterned fiber array is removed, leaving a patterned conductive network on the substrate.

First claim

Opening claim text (preview).

We claim: 1. A method of manufacturing a patterned conductor, comprising: providing a substrate, wherein the substrate comprises: a base material; and, an electrically conductive layer, wherein the electrically conductive layer is disposed on the substrate; providing an electrically conductive layer etchant; providing a spinning material, wherein the spinning material comprises: a carrier; and, a masking material, wherein the masking material is a photosensitive material; providing a developer; forming a plurality of masking fibers by processing the spinning material by a process selected from the group consisting of electrospinning, gas jet electrospinning, needleless electrospinning, and melt electrospinning; depositing the plurality of masking fibers onto the electrically conductive layer, forming a plurality of deposited fibers; optionally, compressing the plurality of deposited fibers on the electrically conductive layer; patterning the plurality of deposited fibers to modify a property of a select portion of the plurality of deposited fibers to provide a treated fiber portion and an untreated fiber portion; developing the plurality of deposited fibers by contacting the plurality of deposited fibers with the developer, wherein either (i) the treated fiber portion, or (ii) the untreated fiber portion is removed; leaving a patterned fiber array; contacting the electrically conductive layer to the electrically conductive layer etchant, wherein the electrically conductive layer that is uncovered by the patterned fiber array is removed from the substrate, leaving a patterned conductive network on the substrate covered by the patterned fiber array to provide the patterned conductor; providing a stripper; and, treating the patterned fiber array with the stripper, wherein the patterned fiber array is removed to uncover the patterned conductive network on the substrate; wherein the patterned conductive network is a controlled pattern; wherein the controlled pattern is a plurality of isolated interconnected conductive networks; wherein each interconnected conductive network in the plurality of isolated interconnected conductive networks is electrically isolated from the other interconnected conductive networks in the plurality of isolated interconnected conductive networks. 2. The method of claim 1 , wherein the patterned conductor is a patterned transparent conductor. 3. The method of claim 2 , wherein the electrically conductive layer is an electrically conductive metal layer selected from the group consisting of silver, copper, palladium, platinum, gold, zinc, silicon, cadmium, tin, lithium, nickel, indium, chromium, antimony, gallium, boron molybdenum, germanium, zirconium, beryllium, aluminum, magnesium, manganese, cobalt, titanium, alloys and oxides thereof. 4. The method of claim 3 , wherein the plurality of masking fibers are formed and deposited onto the electrically conductive layer using electrospinning. 5. The method of claim 4 , wherein the masking material is a copolymer of an alkyl (alkyl)acrylate and an alkyl acrylic acid. 6. The method of claim 5 , wherein the masking material is a copolymer of a C 1-5 alkyl (C 1-4 alkyl)acrylate and a C 1-5 alkyl acrylic acid, wherein the copolymer contains 5 to 10 mol % of the C 1-5 alkyl acrylic acid. 7. The method of claim 3 , wherein the electrically conductive layer is silver. 8. The method of claim 7 , wherein the patterned transparent conductor has a total transmittance of ≧80%; a haze of ≦5%; and, a sheet resistance of ≦5 Ω/sq. 9. A patterned transparent conductor made according to the method of claim 8 .

Assignees

Inventors

Classifications

  • Photoresists · CPC title

  • provided by an outer layer of PCB · CPC title

  • by etching · CPC title

  • Use of materials for the {conductive, e.g. } metallic pattern · CPC title

  • Secondary treatment of printed circuits {(H05K3/1283 takes precedence; embedding circuits in grooves by pressure H05K3/107)} · CPC title

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What does patent US9801284B2 cover?
A method of manufacturing a patterned conductor is provided, comprising: providing a substrate, comprising: a base material with an electrically conductive layer disposed thereon; providing an electrically conductive layer etchant; providing a spinning material, comprising: a carrier; and, a photosensitive masking material; providing a developer; forming a plurality of masking fibers and deposi…
Who is the assignee on this patent?
Dow Global Technologies Llc
What technology area does this patent fall under?
Primary CPC classification H05K3/06. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Oct 24 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).