Digital quadrature modulator and switched-capacitor array circuit

Patent metadata

Field	Value
Publication number	US-9800452-B2
Application number	US-201715487185-A
Country	US
Kind code	B2
Filing date	Apr 13, 2017
Priority date	Oct 15, 2014
Publication date	Oct 24, 2017
Grant date	Oct 24, 2017

Abstract

A digital quadrature modulator holds local oscillator circuitry configured to provide local oscillator signals, and local oscillator polarity logic circuitry configured to select an In-phase and a Quadrature local oscillator signal according to a sign bit of an In-phase control word and a sign bit of a Quadrature control word, respectively. The modulator holds a number of local oscillator control logic circuits, each configured to generate a conditioned signal by gating one or both of the selected local oscillator signals according to values of the In-phase control word and/or values of the Quadrature control word. The modulator has one or more sets of switched-capacitor units, where each unit has an output provided by an output capacitor, and where a signal at the input side of the output capacitor is controlled by a conditioned signal. The outputs of at least two of the switched-capacitor units are combined in a common node.

First claim

What is claimed is:

1. A digital quadrature modulator, comprising:
local oscillator circuitry configured to provide a first set of local oscillator signals with a first duty-cycle, which comprise a positive In-phase local oscillator (LOIP) signal, an opposite polarity In-phase local oscillator (LOIM) signal, a positive Quadrature local oscillator (LOQP) signal, and an opposite polarity Quadrature local oscillator (LOQM) signal;
local oscillator polarity logic circuitry configured to:
select an In-phase local oscillator (LOI) signal between the LOIP signal and the LOIM signal according to a sign bit of an In-phase digital control word (I), and
select a Quadrature local oscillator (LOQ) signal between the LOQP signal and the LOQM signal according to a sign bit of a Quadrature digital control word (Q);

a number of local oscillator control logic circuits, each configured to generate a conditioned signal by gating one or both of the selected LOI and LOQ signals according to values of the In-phase digital control word (I) and/or values of the Quadrature digital control word (Q);
one or more sets of switched-capacitor units, each switched-capacitor unit having an output provided by an output capacitor, wherein a signal at the input side of the output capacitor is determined by one of the conditioned signals; and
a common node configured to combine the outputs of at least two of the switched-capacitor units.

2. The digital quadrature modulator according to claim 1 , wherein:
the local oscillator circuitry is further configured to provide a second set of local oscillator signals with a second duty-cycle, which comprise a second positive In-phase local oscillator (LOIP50%) signal, a second opposite polarity In-phase local oscillator (LOIM50%) signal, a second positive Quadrature local oscillator (LOQP50%) signal, and a second opposite polarity Quadrature local oscillator (LOQM50%) signal;
the local oscillator polarity logic circuitry is further configured to select a second duty-cycle local oscillator (LO50%) signal from the set of provided second duty-cycle local oscillator signals LOIP50%, LOIM50%, LOQP50% and LOQM50% according to the sign bit of the In-phase digital control word (I) and the sign bit of the Quadrature digital control word (Q); and
at least part of the local oscillator control logic circuits are configured to generate the conditioned signal by gating the selected first duty-cycle LOI and LOQ signals and the selected second duty-cycle LO50% signal according to values of the In-phase digital control word (I) and values of the Quadrature digital control word (Q).

3. The digital quadrature modulator according to claim 1 , wherein at least two of the switched-capacitor units have an output capacitor with a first capacitance value, and wherein the output of at least two switched-capacitor units with the first capacitance output value are coupled to each other through one or more series capacitors having a total second capacitance value equal to twice the first capacitance value.

4. The digital quadrature modulator according to claim 1 , wherein:
part or all of the switched-capacitor units are multi-voltage switched-capacitor units, which are configured to connect with at least two supply voltages, with at least a second supply voltage being higher than a first supply voltage; and
the modulator further comprises voltage selection circuitry configured to select the supply voltage of the multi-voltage switched-capacitor units in accordance with one or more received supply voltage selection signals.

5. The digital quadrature modulator according to claim 1 , wherein part or all of the switched-capacitor units are off-mode switched-capacitor units configured to have controllable operation modes including an off-mode, an active voltage switching mode, and a passive constant input voltage mode, wherein for the off-mode the input side of the output capacitor is floating with a small parasitic output capacitance, while for the active and passive modes the output capacitance is equal to a capacitance of an output capacitor of the switched-capacitor unit.

6. The digital quadrature modulator of claim 5 , wherein the modulator further comprises an operation mode control circuitry configured to control the operation mode of the off-mode switched-capacitor units in accordance with one or more operation mode control signals.

7. The digital quadrature modulator of claim 5 , wherein:
a first set of the off-mode switched-capacitor units are configured for having an input side of the output capacitor switching between ground and a third supply voltage when in the active mode; and
a second set of the off-mode switched-capacitor units are configured for having an input side of the output capacitor switching between ground and a fourth supply voltage when in the active mode, wherein the fourth supply voltage being higher than the third supply voltage.

8. The digital quadrature modulator of claim 6 , wherein the operation mode control circuitry is configured to control the operation mode of the first and second set of off-mode switched-capacitor units so that when the operation mode of a number of the second set of off-mode switched-capacitor units are controlled to be in the off-mode, then the operation mode of an equal or greater number of the first set of off-mode switched-capacitor units are controlled to be in the passive or active mode.

9. The digital quadrature modulator of claim 8 , wherein the operation mode control circuitry is configured to control the operation mode of the first and second set of off-mode switched-capacitor units so that when the operation mode of a number of the second set of off-mode switched-capacitor units are controlled to shift from off-mode to active mode, then the operation mode of an equal number of the first set of off-mode switched-capacitor units are controlled to shift from passive or active mode to off-mode.

10. The digital quadrature modulator of claim 6 , wherein the operation mode control circuitry is configured to control the operation mode of the first and second set of off-mode switched-capacitor units so that when the operation mode of a number of the second set of off-mode switched-capacitor units are controlled to shift from active mode to off-mode, then the operation mode of an equal number of the first set of off-mode switched-capacitor units are controlled to shift from off-mode to passive or active mode.

11. The digital quadrature modulator of according to claim 6 , wherein the operation mode control circuitry is configured to set the operation mode of a number of off-mode switched-capacitor units in the off-mode, to thereby change the overall output capacitance.

12. A radio frequency (RF) transmitter comprising:
the digital quadrature modulator in accordance with claim 1 .

13. The RF transmitter of claim 12 , further comprising:
a filter or matching network configured to receive the combined output signal and generate a filtered RF output therefrom.

14. The RF transmitter of claim 12 , further comprising:
a power amplifier configured to receive the combined output signal or the filtered RF output and generate an amplified output therefrom.

15. A combined transmitter comprising:
a plurality of RF transmitters, each RF transmitter in accordance with claim 13 and configured to generate an output power; and
wherein the output powers of the plurality of RF transmitters are combined.

Assignees

• Huawei Tech Co Ltd

Inventors

• Lehtinen Teijo Henrikki

Classifications

• H03F2200/451

  the amplifier being a radio frequency amplifier · CPC title

• H04L27/04

  Modulator circuits; Transmitter circuits · CPC title

• H03D2200/0082

  Quadrature arrangements · CPC title

• H03F3/213

  in integrated circuits · CPC title

• H03H21/0012

  Digital adaptive filters · CPC title