Wireless earphone control method, apparatus and electronic device
US-2024365038-A1 · Oct 31, 2024 · US
US9800272B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9800272-B2 |
| Application number | US-201314136156-A |
| Country | US |
| Kind code | B2 |
| Filing date | Dec 20, 2013 |
| Priority date | Dec 20, 2013 |
| Publication date | Oct 24, 2017 |
| Grant date | Oct 24, 2017 |
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For generating quantized signals, a quantized phase domain related to quantized phases of an input signal is generated. Vectors that the input signal may occupy are calculated based on the quantized phase domain. A first quantized phase of a first component of the input signal is generated per the quantized phase domain, and a second quantized phase of a second component of the input signal is generated per the quantized phase domain.
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What is claimed is: 1. Circuitry for generating a discrete amplitude signal pair having quantized phases, the circuitry comprising: first and second inputs to receive first and second components of an input signal, wherein the input signal is a complex signal, the first component is a variable amplitude I component, and the second component is a variable amplitude Q component; filters to noise shape the input signal; a quantizer, coupled to the filters, to quantize the noise-shaped input signal to fit a vector pair from among a domain of discrete amplitude vectors having quantized phases, wherein combined amplitudes and combined phases of the vector pair are represented by an I value and a Q value from the quantizer; a first adder, coupled to the quantizer and to the first input, to subtract the I value from the first component of the input signal to generate a first difference thereof; a second adder, coupled to the quantizer and to the second input, to subtract the Q value from the second component of the input signal to generate a second difference thereof, wherein the filters are: coupled to the first and second adders; and configured to loop filter the first and second differences for generating the noise-shaped input signal; and a discrete phase modulator, coupled to the quantizer, to convert the vector pair from the quantizer into the discrete amplitude signal pair having quantized phases. 2. The circuitry of claim 1 , wherein the discrete amplitude vectors have a same constant discrete amplitude. 3. The circuitry of claim 1 , wherein the discrete amplitude vectors have various discrete amplitudes. 4. The circuitry of claim 1 , wherein the vector pair is represented by voltages. 5. The circuitry of claim 1 , wherein the vector pair is represented by digital values. 6. The circuitry of claim 1 , wherein the discrete phase modulator includes a phase generator to generate multiple lines of discretely delayed pulses, wherein the multiple lines are representative of respective quantized phases. 7. The circuitry of claim 6 , wherein the discrete amplitude vectors have a same constant discrete amplitude, the discrete phase modulator includes multiplexers coupled to the phase generator and to the quantizer, and converting the vector pair includes: with the multiplexers, selecting lines from among the multiple lines, wherein the pulses of the selected lines are representative of quantized phases of the vector pair from the quantizer. 8. The circuitry of claim 7 , further comprising: a power amplifier, coupled to the multiplexers, to amplify the pulses of the selected lines from the multiplexers; and a power combining circuit, coupled to the power amplifier, to combine the amplified pulses from the power amplifier. 9. The circuitry of claim 6 , wherein the discrete amplitude vectors have various discrete amplitudes, the discrete phase modulator includes multiplexers coupled to the phase generator and to the quantizer, the discrete phase modulator further includes pulse count modulators coupled to the multiplexers and to the quantizer, and converting the vector pair includes: with the multiplexers, selecting lines from among the multiple lines, wherein the pulses of the selected lines are representative of quantized phases of the vector pair from the quantizer; and with the pulse count modulators, in response to the pulses of the selected lines from the multiplexers, and in response to discrete amplitudes of the vector pair from the quantizer, generating modulated pulses that are representative of quantized phases and discrete amplitudes of the vector pair. 10. The circuitry of claim 9 , further comprising: a power amplifier, coupled to the pulse count modulators, to amplify the modulated pulses from the pulse count modulators; and a power combining circuit, coupled to the power amplifier, to combine the amplified modulated pulses from the power amplifier. 11. A method performed by circuitry for generating a discrete amplitude signal pair having quantized phases, the method comprising: receiving an input signal that is a complex signal having: a first component that is a variable amplitude I component; and a second component that is a variable amplitude Q component; noise shaping the input signal; with a quantizer, quantizing the noise-shaped input signal to fit a vector pair from among a domain of discrete amplitude vectors having quantized phases, wherein combined amplitudes and combined phases of the vector pair are represented by an I value and a Q value from the quantizer; and converting the vector pair from the quantizer into the discrete amplitude signal pair having quantized phases; wherein the noise shaping of the input signal includes: subtracting the I value from the first component of the input signal to generate a first difference thereof; subtracting the Q value from the second component of the input signal to generate a second difference thereof; and loop filtering the first and second differences to generate the noise-shaped input signal. 12. The method of claim 11 , wherein the discrete amplitude vectors have a same constant discrete amplitude. 13. The method of claim 11 , wherein the discrete amplitude vectors have various discrete amplitudes. 14. The method of claim 11 , wherein the vector pair is represented by voltages. 15. The method of claim 11 , wherein the vector pair is represented by digital values. 16. The method of claim 11 , further comprising: with a phase generator, generating multiple lines of discretely delayed pulses, wherein the multiple lines are representative of respective quantized phases. 17. The method of claim 16 , wherein the discrete amplitude vectors have a same constant discrete amplitude, and converting the vector pair includes: with multiplexers, selecting lines from among the multiple lines, wherein the pulses of the selected lines are representative of quantized phases of the vector pair from the quantizer. 18. The method of claim 17 , further comprising: with a power amplifier, amplifying the pulses of the selected lines from the multiplexers; and with a power combining circuit, combining the amplified pulses from the power amplifier. 19. The method of claim 16 , wherein the discrete amplitude vectors have various discrete amplitudes, and converting the vector pair includes: with multiplexers, selecting lines from among the multiple lines, wherein the pulses of the selected lines are representative of quantized phases of the vector pair from the quantizer; and with pulse count modulators, in response to the pulses of the selected lines from the multiplexers, and in response to discrete amplitudes of the vector pair from the quantizer, generating modulated pulses that are representative of quantized phases and discrete amplitudes of the vector pair. 20. The method of claim 19 , further comprising: with a power amplifier, amplifying the modulated pulses from the pulse count modulators; and with a power combining circuit, combining the amplified modulated pulses from the power amplifier.
Circuits · CPC title
using a pair of orthogonal carriers, e.g. quadrature carriers · CPC title
Signal structure · CPC title
using vector summing of two or more constant amplitude phase-modulated signals · CPC title
using analogue-digital or digital-analogue conversion (H03F3/2173 takes precedence) · CPC title
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