Loop parameter sensor using repetitive phase errors

Patent metadata

Field	Value
Publication number	US-9800251-B2
Application number	US-201514879933-A
Country	US
Kind code	B2
Filing date	Oct 9, 2015
Priority date	Apr 18, 2011
Publication date	Oct 24, 2017
Grant date	Oct 24, 2017

Abstract

A method and system are disclosed for measuring a specified parameter in a phase-locked loop frequency synthesizer (PLL). In one embodiment, the method comprises introducing multiple phase errors in the PLL, measuring a specified aspect of the introduced phase errors, and determining a value for the specified parameter using the measured aspects of the introduced phase errors. In one embodiment, the phase errors are introduced repetitively in the PLL, and these phase errors produce a modified phase difference between the reference signal and the feedback signal in the PPL. In one embodiment, crossover times, when this modified phase difference crosses over a preset value, are determined, and these crossover times are used to determine the value for the specified parameter. In an embodiment, the parameter is calculated as a mathematical function of the crossover times. The parameter may be, for example, the bandwidth of the PLL.

First claim

The invention claimed is:

1. A method of measuring a specified parameter in a phase-locked loop frequency synthesizer (PLL), wherein a reference signal is compared to a feedback signal to determine a phase difference between the reference and feedback signals, the method comprising:
a phase error source introducing multiple phase errors in the PLL between the reference and feedback signals over a period of time;
a phase error measuring unit measuring the multiple phase errors between the reference signal and the feedback signal, including, for each of the phase errors, a cross-over detector detecting a time when a phase error crossover time occurs, said phase error crossover time occurring when the phase error between the reference and feedback signals crosses over a preset value; and
determining a value for the specified parameter using the multitude of detected measurements of the phase error crossover times; and
wherein the detecting a phase error crossover time includes
the cross-over detector receiving the reference signal and the feedback signal at a crossover detector, and using the received reference signal and the received feedback signal at the crossover detector to determine each phase error crossover time, and
a timer unit counter using an output from the cross-over detector to determine for each of the phase errors, a time taken, after introduction of the each phase error, to achieve a crossover when the phase error between the reference and feedback signals crosses over the preset value.

2. The method according to claim 1 , wherein the using an output from the crossover detector includes receiving the output from the cross-over detector at a counter, and using the counter to determine for each of the phase errors, the time taken, after introduction of the phase error, to achieve the crossover when the phase error between the reference and feedback signals crosses over the preset value.

3. The method according to claim 2 , wherein:
the introducing multiple phase errors in the PLL between the reference and feedback signals includes using a programmable divide to apply a plurality of divide ratios to the feedback signal to introduce the multiple phase errors in the PLL, and applying a change divide ratio signal to a multiplexor to control the multiplexor to select different ones of the divide ratios for the programmable divide to apply to the feedback signal to introduce the multiple phase errors in the PLL; and
the using the counter to determine for each of the phase errors, the time taken, after introduction of the phase error, to achieve the crossover includes receiving the output from the cross-over detector and the change divide ratio signal at the counter; and using the counter to determine for each of the phase errors, the time taken, after introduction of the phase error, to achieve the crossover when the phase error between the reference and feedback signals crosses over the preset value.

4. The method according to claim 1 , wherein:
the introducing multiple phase errors in the PLL includes introducing multiple phase errors having opposite polarities between the reference signal and the feedback signal;
the detecting a time when a phase error crossover time occurs includes using measurements of the crossover times of a plurality of the introduced phase errors having opposite polarities to overcome offsets in measurements of the phase difference between the reference and feedback signals; and
the introducing multiple phase errors having opposite polarities includes alternating the polarities of successive ones of the multiple phase errors, including
using a programmable divide to apply a plurality of divide ratios to the feedback signal, and
applying a change divide ratio signal to a multiplexor to control the multiplexor to select alternate ones of the divide ratios for the programmable divide to apply to the feedback signal to alternate the polarities of successive ones of the multiple phase errors.

5. The method according to claim 1 , wherein said phase errors are introduced repetitively in the PLL.

6. The method according to claim 2 , wherein said phase errors are introduced in the PLL at regular periods.

7. The method according to claim 2 , wherein said phase errors are introduced in the PLL at defined times.

8. The method according to claim 1 , wherein said parameter is calculated as a mathematical function of said crossover times.

9. The method according to claim 1 , wherein:
the introducing multiple phase errors in the PLL includes, over a given time period, introducing a respective one of the phase errors in the PLL a specified waiting time after each of the crossover times in said given period of time.

10. The method according to claim 1 , wherein the PLL comprises a plurality of components, and the method further comprises using said determined value to adjust operation of one or more of the components of the PLL.

11. A loop sensor using multiple phase errors in a phase-locked loop frequency synthesizer (PLL), wherein a reference signal is compared to a feedback signal to determine a phase difference between the reference and feedback signals, the loop sensor comprising:
a phase error source for introducing multiple phase errors in the PLL between the reference and feedback signals over a period of time; and
a phase error measuring unit for measuring the multiple phase errors between the reference signal and the feedback signal, including, for detecting for each of the phase errors, a time when a phase error crossover time occurs, said phase error crossover time occurring when the phase error between the reference and feedback signals crosses over a preset value;
the phase error measuring unit including a crossover detector for receiving the reference signal and the feedback signal, and for using the reference signal and the feedback signal to determine each phase error crossover time, and
a timer unit counter for using an output from the cross-over detector to determine for each of the phase errors, a time taken, after introduction of the each phase error, to achieve a crossover when the phase error between the reference and feedback signals crosses over the preset value.

12. The loop sensor according to claim 11 , wherein:
the timer unit counter includes a counter for receiving the output from the cross-over detector to determine for each of the phase errors, the time taken, after introduction of the phase error, to achieve the crossover when the phase error between the reference and feedback signals crosses over the preset value,
the introducing multiple phase errors in the PLL includes introducing multiple phase errors having opposite polarities between the reference signal and the feedback signal; and the detecting a time when a phase error crossover time occurs includes using measurements of the crossover times of a plurality of the introduced phase errors having opposite polarities to overcome offsets in measurements of the phase difference between the reference and feedback signals.

13. The loop sensor according to claim 12 , wherein:
the phase error source includes a programmable divide to apply a plurality of divide ratios to the feedback signal to introduce the multiple phase errors in the PLL, and a multiplexor to select different ones of the divide rations for the programmable divide to apply to the feedback signal, and wherein a change divide ratio signal is applied to the multiplexor to control the multiplexor to select the different ones of the divide ratios for the programmable divide; and
the counter receives the change divide ratio signal and uses the change divide ration signal and the outpu

Assignees

• IBM

Inventors

• Ferriss Mark
• Natarajan Arun S
• Parker Benjamin D
• Rylyakov Alexander V
• Tierno Jose A
• Yaldiz Soner

Classifications

• H03L7/18

  using a frequency divider or counter in the loop (H03L7/20, H03L7/22 take precedence) · CPC title

• H03L7/1077

  by changing characteristics of the phase or frequency detection means (H03L7/1072 takes precedence) · CPC title

• H03L7/1075

  by changing characteristics of the loop filter, e.g. changing the gain, changing the bandwidth (H03L7/1072 takes precedence) · CPC title

• H03L7/093

  using special filtering or amplification characteristics in the loop (H03L7/087 - H03L7/091 take precedence) · CPC title

• H03L7/085 Primary

  concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal (H03L7/10 takes precedence; circuits for comparing the phase or frequency of two mutually-independent oscillations H03D13/00) · CPC title