Digitally controlled oscillator and electronic device including the same

Patent metadata

Field	Value
Publication number	US-9800250-B2
Application number	US-201615236613-A
Country	US
Kind code	B2
Filing date	Aug 15, 2016
Priority date	Aug 28, 2013
Publication date	Oct 24, 2017
Grant date	Oct 24, 2017

Abstract

Provided are a digitally controlled oscillator and an electronic device including the digitally controlled oscillator. The digitally controlled oscillator includes a digital control unit and a power control oscillation unit. The digital control unit compensates for a difference between a feedback signal of an output power and a reference power set based on an input digital control signal and outputting an output power. The power control oscillation unit receives a signal related to the output power, and generates an output clock having an oscillation frequency in response to the signal related to the output power.

First claim

What is claimed is:

1. An oscillator comprising:
a power control oscillator; and
a digital controller configured to supply an output power to the power control oscillator and comprising:
a power level setting circuit configured to set a level of a reference power in response to a digital control signal; and
a power level compensation circuit configured to compensate a difference between the reference power and a feedback signal of the output power,

wherein the power level setting circuit is configured to generate a temporary reference power, to modulate the temporary reference power, and to output the reference power to the power level compensation circuit,
wherein the power level compensation circuit comprises:
a constant power supply circuit configured to compensate a level of the output power;
a divider configured to receive the output power and divide the output power into a first divided power and a second divided power;
a first comparing circuit configured to compare the first divided power and the reference power, and configured to generate a first difference value; and
a second comparing circuit configured to compare the second divided power and the reference power, and configured to generate a second difference value, and

wherein the power level setting circuit comprises:
a first multiplier configured to multiply the first difference value;
a second multiplier configured to multiply the second difference value; and
an adder configured to add an output of the first multiplier and an output of the second multiplier, and configured to output an added value as the reference power to the constant power supply circuit.

2. The oscillator of claim 1 , wherein the power control oscillator is a voltage control oscillator that is controlled by an output voltage.

3. The oscillator of claim 1 , wherein the power control oscillator receives a signal related to the output power, and generates an output clock having an oscillation frequency in response to the signal related to the output power.

4. The oscillator of claim 1 , wherein the reference power is represented by a reference voltage.

5. The oscillator of claim 1 , wherein the power level setting circuit comprises:
a first voltage level generator configured to generate the temporary reference power in response to a first portion of the digital control signal; and
a second voltage level generator configured to modulate the temporary reference power and to output the reference power in response to a second portion of the digital control signal.

6. The oscillator of claim 5 , wherein the first portion of the digital control signal is a value represented by upper bits in the digital control signal, and
the second portion of the digital control signal is a value represented by remaining bits except for the upper bits in the digital control signal.

7. The oscillator of claim 1 , wherein the first multiplier configured to multiply the first difference value with a first coefficient,
the second multiplier configured to multiply the second difference value with a second coefficient that is different from the first coefficient.

8. The oscillator of claim 7 , wherein a sum of the first coefficient and the second coefficient is a constant value.

9. An oscillator comprising:
a power control oscillator; and
a digital controller configured to supply an output power to the power control oscillator and including:
a power level setting circuit configured to set a level of a reference power in response to a digital control signal; and
a power level compensation circuit configured to compensate a difference between the reference power and a feedback signal of the output power;

wherein the power level setting circuit includes:
a first voltage level generator configured to output a temporary reference power in response to a first portion of the digital control signal;
a second voltage level generator configured to modulate the temporary reference power and to output the reference power in response to a second portion of the digital control signal; and
a multiplier configured to multiply a difference value with a coefficient and to output a multiplier result, the reference power determined in response to the multiplier result.

10. The oscillator of claim 9 , wherein the reference power is represented by a reference voltage.

11. The oscillator of claim 9 , wherein the first portion of the digital control signal is a value represented by upper bits in the digital control signal, and
the second portion of the digital control signal is a value represented by remaining bits except for the upper bits in the digital control signal.

12. The oscillator of claim 9 , wherein the power level compensation circuit comprises:
a constant power supply circuit configured to compensate a level of the output power; and
a divider configured to receive the output power and divide the output power into a first divided power and a second divided power;
a first comparing circuit configured to compare the first divided power and the reference power, and configured to generate a first difference value; and
a second comparing circuit configured to compare the second divided power and the reference power, and configured to generate a second difference value.

13. The oscillator of claim 9 , wherein the multiplier of the power level setting circuit comprises:
a first multiplier configured to multiply a first difference value with a first coefficient; and
a second multiplier configured to multiply a second difference value with a second coefficient; and wherein the power level setting circuit further comprises:
an adder configured to add an output of the first multiplier and an output of the second multiplier, and configured to output an added value as the reference power to the power level compensation circuit.

14. An oscillator comprising:
a power control oscillator; and
a digital controller configured to supply an output power to the power control oscillator and including:
a power level setting circuit configured to generate a plurality of temporary reference powers, to modulate the plurality of temporary reference powers, and to output a reference power in response to a digital control signal; and
a power level compensation circuit configured to compensate a plurality of difference values between the plurality of temporary reference powers and a feedback signal of the output power, and to output the output power,

wherein the power level setting circuit comprises:
a first multiplier configured to multiply a first difference value of the plurality of difference values and a first coefficient;
a second multiplier configured to multiply a second difference value of the plurality of difference values and a second coefficient; and
an adder configured to add an output of the first multiplier and an output of the second multiplier, and configured to output an added value as the reference power to the power level compensation circuit.

15. The oscillator of claim 14 , wherein the digital controller comprises a sigma-delta modulator (SDM) configured to modulate the first coefficient and the second coefficient.

16. The oscillator of claim 14 , wherein a sum of the first coefficient and the second coefficient is a constant value.

17. The oscillator of claim 14 , wherein the first coefficient and the second coefficient are set to a number corresponding to a number of lower bits in the digital control signal.

18. The oscillator of claim 14 , wherein the first coefficient and the second coefficient are s

Assignees

• Samsung Electronics Co Ltd

Inventors

• Kim Du-Ho

Classifications

• H03L1/02

  against variations of temperature only · CPC title

• H03L5/02 Primary

  of power · CPC title

• H03L7/099 Primary

  concerning mainly the controlled oscillator of the loop · CPC title

• H03L7/06

  using a reference signal applied to a frequency- or phase-locked loop · CPC title

• H03L1/00

  Stabilisation of generator output against variations of physical values, e.g. power supply · CPC title