Low power nanoelectronics

Patent metadata

Field	Value
Publication number	US-9800094-B2
Application number	US-201514712182-A
Country	US
Kind code	B2
Filing date	May 14, 2015
Priority date	May 14, 2014
Publication date	Oct 24, 2017
Grant date	Oct 24, 2017

Abstract

Disclosed are low power electronic devices configured to exploit the sub-threshold swing, unidirectional tunneling, and low-voltage operation of steep slope-tunnel tunnel field-effect transistors (TFET) to improve power-conversion efficiency and power-efficiency of electrical systems incorporating the TFET as an electrical component to perform energy harvesting, signal processing, and related operations. The devices include a HTFET-based rectifier having various topologies, a HTFET-based DC-DC charge pump converter, a HTFET-based amplifier having an amplifier circuit including a telescopic operational transconductance amplifier, and a HTFET-based SAR A/D converter having a HTFET-based transmission gate DFF. Any one of the devices may be used to generate a RF-powered system with improved power conversion efficiencies of power harvesters and power efficiencies of processing components within the system.

First claim

What is claimed is:

1. An RF powered system, comprising:
a power harvesting and management block configured to receive an RF signal, including an impedance matching component configured to maximize power transfer from the received RF signal, a rectifier component configured to convert alternating current generated by the RF signal to direct current, a DC-DC converter component configured to boost output voltage of the rectifier component, and a voltage regulator configured to provide a constant output voltage, wherein the rectifier component comprises a stage including:
a first rectifier TFET having a source, a gate, and a drain;
a second rectifier TFET having a source, a gate, and a drain;
a third rectifier TFET having a source, a gate, and a drain; and,
a fourth rectifier TFET having a source, a gate, and a drain;
wherein the first rectifier TFET is a N-type TFET;
wherein the second rectifier TFET is a P-type TFET;
wherein the third rectifier TFET is a N-type TFET;
wherein the fourth rectifier TFET is a P-type TFET;
wherein the source of the first rectifier TFET, the source of the second rectifier TFET, the gate of the third rectifier TFET, and the gate of the fourth rectifier TFET are connected at a first rectifier node;
wherein the gate of the first rectifier TFET, the gate of the second rectifier TFET, the source of the third rectifier TFET and the source of the fourth rectifier TFET are connected at a second rectifier node;
wherein the drain of the first rectifier TFET and the drain of the third rectifier TFET are connected at a third rectifier node; and,
wherein the drain of the second rectifier TFET and the drain of the fourth rectifier TFET are connected at a fourth rectifier node; and,

an analog/RF front end and digital storage/processing block configured to receive at least one of the RF signal via a receiver and sensor signal from a sensor, process at least one of the RF signal and the sensor signal, and transmit the at least one processed RF signal and sensor signal via a transmitter.

2. The RF-powered system recited in claim 1 , wherein the analog/RF front end and digital storage/processing block is configured to receive the constant output voltage as a supply voltage.

3. The RF-powered system recited in claim 1 , wherein at least one TFET is a HTFET.

4. The RF powered system recited in claim 1 , wherein the DC-DC converter component comprises:
a first DC-DC TFET, a second DC-DC TFET, a third DC-DC TFET, and a fourth DC-DC TFET, each having a source, a gate, and a drain;
wherein the first DC-DC TFET and the second DC-DC TFET are N-type TFETs, and the third DC-DC TFET and the fourth DC-DC TFET are P-type TFETs;
wherein the source of the first DC-DC TFET, the gate of the second DC-DC TFET, the source of the third DC-DC TFET, and a top plate of a first capacitor are connected to a first DC-DC node;
wherein the gate of the first DC-DC TFET, the source of the fourth DC-DC TFET, and the source of the second DC-DC TFET are connected to a top plate of a second capacitor by way of a second DC-DC node;
wherein the drain of the first DC-DC TFET and the drain of the second DC-DC TFET are connected to a third DC-DC node configured to receive an input voltage; and,
wherein the drain of the third DC-DC TFET and the drain of the fourth DC-DC TFET are connected to a fourth DC-DC node configured to deliver an output voltage.

5. The RF powered system recited in claim 4 , wherein the first and second capacitors are configured to connect to a two-phase generator.

6. An RF powered system, comprising:
a power harvesting and management block configured to receive an RF signal, including an impedance matching component configured to maximize power transfer from the received RF signal, a rectifier component configured to convert alternating current generated by the RF signal to direct current, a DC-DC converter component configured to boost output voltage of the rectifier component, and a voltage regulator configured to provide a constant output voltage;
an analog/RF front end and digital storage/processing block configured to receive at least one of the RF signal via a receiver and sensor signal from a sensor, process at least one of the RF signal and the sensor signal, and transmit the at least one processed RF signal and sensor signal via a transmitter, wherein the analog/RF front end and digital storage/processing block includes an amplifier component comprising:
a first amplifier TFET, a second amplifier TFET, a third amplifier TFET, a fourth amplifier TFET, a fifth amplifier TFET, a sixth amplifier TFET, a seventh amplifier TFET, an eighth amplifier TFET, a ninth amplifier TFET, and a tenth TFET amplifier TFET, each having a source, a gate, and a drain;
wherein the first amplifier TFET, the second amplifier TFET, the third amplifier TFET, the fourth amplifier TFET, the ninth amplifier TFET, and the tenth amplifier TFET are N-type TFETs, and the fifth amplifier TFET, the sixth amplifier TFET, the seventh amplifier TFET, and the eighth amplifier TFET are P-type TFETs;
wherein the sources of the first amplifier TFET and the tenth amplifier TFET are connected to ground;
wherein the sources of the first amplifier TFET and the second amplifier TFET and the drain of the ninth amplifier TFET are connected at a first amplifier node;
wherein the gate of the first amplifier TFET is connected to a positive input port V+ and the gate of the second amplifier TFET is connected to a negative input port V−;
wherein the gates of the third amplifier TFET and the fourth amplifier TFET are connected at a second amplifier node with a reference voltage Vb 1 ;
wherein the source of the third amplifier TFET is connected to the drain of the first amplifier TFET and the source of the fourth amplifier TFET is connected to the drain of the second amplifier TFET;
wherein the drains of the third amplifier TFET and the fifth amplifier TFET, and the gates of the fifth amplifier TFET, the sixth amplifier TFET, the seventh amplifier TFET, and the eighth amplifier TFET are connected at a third amplifier node;
wherein the drains of the sixth amplifier TFET and the fourth amplifier TFET are connected at a fourth amplifier node;
wherein the drain of the seventh amplifier TFET is connected to the source of the fifth amplifier TFET, and the drain of the eighth amplifier TFET is connected to the source of the sixth amplifier TFET;
wherein the sources of the seventh amplifier TFET and the eighth amplifier TFET are connected to a power supply V DD ; and,
wherein the gate of the tenth amplifier TFET, the drain of the tenth amplifier TFET, and the gate of the ninth amplifier TFET are connected to receive a biasing current source at a fifth amplifier node.

7. The RF-powered system recited in claim 6 , wherein the analog/RF front end and digital storage/processing block is configured to receive the constant output voltage as a supply voltage.

8. The RF-powered system recited in claim 6 , wherein at least one TFET is a HTFET.

9. The RF-powered system recited in claim 6 , further comprising a multi-channel recording architecture including at least one channel connected in parallel with the amplifier component, the at least one channel comprising:
an eleventh amplifier TFET, a twelfth amplifier TFET, a thirteenth amplifier TFET, and a fourteenth amplifier TFET, each having a source, a gate, and a drain;
wherein the eleventh amplifier TFET and the twelfth amplifier TFET are P-type TFETs;
wherein the thirteenth amplifier TFET and the fourteenth amplifier TFET are N-type TFETs;
wherein the eleventh amplifier TFET, the twelfth amplifier TFET, the thirteenth amplifier TFET, and the fourteenth amplifier TFET are connected in series, wherein the drain of

Assignees

• Penn State Res Found

Inventors

• Liu Huichu
• Vaddi Ramesh
• Narayanan Vijaykrishnan
• Datta Suman
• Seok Kim Moon
• Li Xueqing
• Schmid Alexandre
• Shoaran Mahsa
• Heo Unsuk

Classifications

• H02J50/001

  Energy harvesting or scavenging · CPC title

• H02J50/20 Primary

  using microwaves or radio frequency waves · CPC title

• H02J4/25 Primary

  for transfer of electric power between AC and DC networks, e.g. for supplying the DC section within a load from an AC mains system · CPC title

• H10D12/211

  Gated diodes · CPC title

• H01L29/7391

  Electricity · mapped topic