Field effect transistor (FET) structure with integrated gate connected diodes

Patent metadata

Field	Value
Publication number	US-9799645-B2
Application number	US-201514947197-A
Country	US
Kind code	B2
Filing date	Nov 20, 2015
Priority date	Nov 20, 2015
Publication date	Oct 24, 2017
Grant date	Oct 24, 2017

Abstract

A structure having: a plurality of field effect transistors (FETs) connected between a common input and a common output, each one of the field effect transistors comprises: a source region, a drain region, and a gate electrode for controlling carriers through a channel region of a transistor region of the structure between the source region and the drain region; a plurality of diodes, each one of the diodes being associated with a corresponding one of the plurality of FETs, each one of the diodes having an electrode in Schottky contact with a diode region of the corresponding one of the FETs. The gate electrode and the diode electrode extend along parallel lines. The source region, the drain region, the channel region, and a diode region having therein the diode are disposed along a common line.

First claim

What is claimed is:

1. A structure, comprising:
a plurality of field effect transistors (FETs) connected between a common input and a common output, each one of the field effect transistors comprises: a source region, a drain region, and a gate electrode for controlling carriers through a channel region of a transistor region of the structure between the source region and the drain region;
a plurality of diodes, each one of the diodes being associated with a corresponding one of the plurality of FETs, each one of the diodes having an electrode in Schottky contact with a diode region of the corresponding one of the FETs;
wherein each one of the diodes has an electrode in Schottky contact with a diode region of the structure; and
wherein the gate electrode and a diode electrode extend along parallel lines.

2. A structure, comprising:
a plurality of field effect transistors (FETs) connected between a common input and a common output, each one of the field effect transistors comprises: a source region, a drain region, and a gate electrode for controlling carriers through a channel region of a transistor region of the structure between the source region and the drain region;
a plurality of diodes, each one of the diodes being associated with a corresponding one of the plurality of FETs, each one of the diodes having an electrode in Schottky contact with a diode region of the corresponding one of the FETs; and
wherein the source region, the drain region, the channel region, and the diode region are disposed along a common line.

3. The structure recited in claim 2 wherein the gate electrode and the diode electrode extend along parallel lines and wherein the common line is perpendicular to the parallel lines.

4. A structure, comprising:
a plurality of field effect transistors (FETs) connected between a common input and a common output, each one of the field effect transistors comprises: a source region, a drain region, and a gate electrode for controlling carriers through a channel region of a transistor region of the structure between the source region and the drain region;
a plurality of diodes, each one of the diodes being associated with a corresponding one of the plurality of FETs, each one of the diodes having an electrode in Schottky contact with a diode region of the corresponding one of the FETs;
wherein each one of the diodes is disposed proximate to the corresponding one of the FETs; and
wherein the source region, the drain region, the channel region, and the diode region are disposed along a common line.

5. A structure, comprising:
a plurality of field effect transistors (FETs) connected between a common input and a common output, each one of the field effect transistors comprises: a source region, a drain region, and a gate electrode for controlling carriers through a channel region of a transistor region of the structure between the source region and the drain region;
a plurality of diodes, each one of the diodes being associated with a corresponding one of the plurality of FETs, each one of the diodes having an electrode in Schottky contact with a diode region of the corresponding one of the FETs, each one of the plurality of diodes providing a non-linear capacitance versus gate region to source region voltage at the gate region.

Assignees

• Raytheon Co

Inventors

• Bettencourt John P
• Mallavarpu Raghuveer

Classifications

• H03F2200/222

  A circuit being added at the input of an amplifier to adapt the input impedance of the amplifier · CPC title

• H03F2200/126

  A diode being coupled in a feedback path of an amplifier stage, e.g. active or passive diode · CPC title

• H03F1/3205

  in field-effect transistor amplifiers · CPC title

• H03F2200/75

  the amplifier stage being a common source configuration MOSFET · CPC title

• H03F1/3276

  using the nonlinearity inherent to components, e.g. a diode · CPC title