Integrated circuits with programmable memory cells and methods for programming the same

US9799387B1 · US · B1

Patent metadata
FieldValue
Publication numberUS-9799387-B1
Application numberUS-201615386200-A
CountryUS
Kind codeB1
Filing dateDec 21, 2016
Priority dateDec 21, 2016
Publication dateOct 24, 2017
Grant dateOct 24, 2017

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  1. Title

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  2. Abstract

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  5. First independent claim

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Abstract

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Integrated circuits with memory cells and methods of programming the memory cells are provided. In an exemplary embodiment, a method of programming a memory cell includes determining a memory cell temperature for a memory cell within an integrated circuit. A pulse number is determined, where the pulse number is the number of electrical pulses at a set voltage required to program the memory cell at the memory cell temperature. The memory cell is programmed with a write operation, where the write operation includes the pulse number of electrical pulses.

First claim

Opening claim text (preview).

What is claimed is: 1. A method of programming a memory cell comprising: determining a memory cell temperature for the memory cell within an integrated circuit; determining a pulse number, wherein the pulse number is a number of electrical pulses at a set voltage required to program the memory cell at the memory cell temperature, and wherein the pulse number is dependent on the memory cell temperature; and programming the memory cell with a write operation, wherein the write operation comprises the pulse number of electrical pulses at the set voltage. 2. The method of claim 1 wherein: determining the memory cell temperature comprises determining the memory cell temperature for a magnetoresistive random access memory cell. 3. The method of claim 2 further comprising: determining a program direction for the memory cell, wherein the program direction comprises programming the memory cell to a parallel mode or programming the memory cell to an anti-parallel mode. 4. The method of claim 3 wherein determining the pulse number comprises determining the pulse number for the program direction. 5. The method of claim 3 wherein determining the pulse number comprises determining the pulse number wherein the set voltage depends on the program direction. 6. The method of claim 1 wherein programming the memory cell with a write operation comprises changing a free layer of the memory cell from a parallel pole with a fixed layer to an anti-parallel pole with the fixed layer. 7. The method of claim 1 wherein determining the pulse number comprises determining the pulse number at the set voltage, wherein the set voltage is independent of the memory cell temperature, and wherein the set voltage is about constant for a program direction. 8. The method of claim 1 wherein the write operation for the memory cell comprises: holding a word line voltage constant, wherein the word line voltage is the voltage of a word line, and wherein the word line is in electrical communication with the memory cell; and sending the write operation through one of a source line or a bit line, wherein the source line is in electrical communication with the memory cell and the bit line is in electrical communication with the memory cell. 9. The method of claim 1 wherein the write operation for the memory cell comprises: sending the write operation through a word line, wherein the word line is in electrical communication with the memory cell; controlling a source line voltage of a source line at a constant voltage, wherein the source line is in electrical communication with the memory cell; and controlling a bit line voltage of a bit line at a constant voltage, wherein the bit line is in electrical communication with the memory cell. 10. The method of claim 1 further comprising: determining a pulse duration for the memory cell, wherein the pulse duration is the duration of the electrical pulse. 11. The method of claim 10 wherein determining the pulse duration comprises determining the pulse duration for each electrical pulse of the pulse number. 12. The method of claim 1 wherein the write operation for the memory cell comprises generating and sending the write operation with a plurality of circuits, wherein the plurality of circuits for generating and sending the write operation are exclusively digital. 13. A method of programming a memory cell comprising: determining a memory cell temperature for the memory cell; determining a pulse duration, wherein the pulse duration is a duration of a write operation required to program the memory cell at the memory cell temperature; and programming the memory cell with the write operation, wherein the write operation is at a set voltage that is independent of the memory cell temperature, wherein the set voltage is about constant for a program direction, and wherein the write operation comprises an electrical pulse at the pulse duration and at the set voltage. 14. The method of claim 13 wherein determining the memory cell temperature comprises determining the memory cell temperature for a magnetoresistive random access memory cell. 15. The method of claim 13 wherein the write operation for the memory cell comprises programming the memory cell wherein the write operation comprises more than one electrical pulse at the set voltage. 16. The method of claim 15 wherein determining the pulse duration comprises determining the pulse duration for each electrical pulse at the set voltage, wherein the pulse duration varies from one electrical pulse at the set voltage to another electrical pulse at the set voltage. 17. The method of claim 13 wherein determining the pulse duration comprises referring to one of a parallel to anti-parallel look up table or an anti-parallel to parallel look up table. 18. The method of claim 13 further comprising: determining a program direction for the memory cell, wherein the program direction comprises programming the memory cell to a parallel mode or programming the memory cell to an anti-parallel mode; and wherein programming the memory cell comprises programming the memory cell wherein the set voltage depends on the program direction. 19. The method of claim 13 further comprising: determining a program direction for the memory cell; and wherein determining the pulse duration for the memory cell comprises determining the pulse duration for the memory cell at the memory cell temperature, wherein the pulse duration depends on the program direction. 20. An integrated circuit comprising: a memory cell; a memory cell temperature sensing element configured to determine a memory cell temperature of the memory cell; and a write operation determination circuit configured to generate a write operation comprising one or more electrical pulses at a set voltage, wherein the set voltage is about constant for a program direction, wherein the set voltage is independent of the memory cell temperature, and wherein the number of electrical pulses is dependent on the memory cell temperature.

Assignees

Inventors

Classifications

  • Writing or programming circuits or methods · CPC title

  • G11C7/04Primary

    with means for avoiding disturbances due to temperature effects · CPC title

  • using elements in which the storage effect is based on magnetic spin effect · CPC title

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What does patent US9799387B1 cover?
Integrated circuits with memory cells and methods of programming the memory cells are provided. In an exemplary embodiment, a method of programming a memory cell includes determining a memory cell temperature for a memory cell within an integrated circuit. A pulse number is determined, where the pulse number is the number of electrical pulses at a set voltage required to program the memory cell…
Who is the assignee on this patent?
Globalfoundries Sg Pte Ltd
What technology area does this patent fall under?
Primary CPC classification G11C11/1675. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Oct 24 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (B1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 9 related publications on this page (citations in our corpus or others sharing the same primary CPC).