Cryptographic processing device and cryptographic processing method

US9794068B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9794068-B2
Application numberUS-201514869470-A
CountryUS
Kind codeB2
Filing dateSep 29, 2015
Priority dateDec 16, 2014
Publication dateOct 17, 2017
Grant dateOct 17, 2017

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A memory stores therein a first vector. A processor generates a first encrypted polynomial by encrypting a first polynomial that corresponds to a first binary vector obtained by performing a binary transformation on elements of the first vector. A transmitter transmits to a cryptographic operation device cryptographic information that represents the first encrypted polynomial. The cryptographic operation device multiplies the first encrypted polynomial by a second encrypted polynomial that is generated by encrypting a second polynomial that corresponds to a second binary vector obtained by performing a binary transformation on elements of a second vector, so as to generate a third encrypted polynomial. When assigning 2 to a variable in a prescribed portion of a third polynomial obtained by decrypting the third encrypted polynomial, a result of an operation of the first vector and the second vector is obtained.

First claim

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What is claimed is: 1. A cryptographic processing device comprising: a memory that stores therein a first vector; a processor that generates a first encrypted polynomial by encrypting a first polynomial that corresponds to a first binary vector obtained by performing a binary transformation on elements of the first vector; and a transmitter that transmits cryptographic information that represents the first encrypted polynomial to a cryptographic operation device that multiplies the first encrypted polynomial by a second encrypted polynomial to generate a third encrypted polynomial, wherein the processor or another cryptographic processing device generates the second encrypted polynomial by encrypting a second polynomial that corresponds to a second binary vector obtained by performing a binary transformation on elements of a second vector, and wherein an analysis device obtains a result of an operation of the first vector and the second vector by assigning 2 to a variable in a prescribed portion of a third polynomial obtained by decrypting the third encrypted polynomial. 2. The cryptographic processing device according to claim 1 , wherein the processor generates the first binary vector by transforming each of the elements of the first vector into a bit string including a plurality of bits and by inserting a bit string including a plurality of bit values that represent a plurality of zeros between two bit strings that correspond to two of the elements of the first vector. 3. The cryptographic processing device according to claim 2 , wherein the number of bits in the bit string including the plurality of bit values that represent the plurality of zeros is equal to the number of bits d in the bit string including the plurality of bits, the prescribed portion of the third polynomial corresponds to terms that are included in the third polynomial and whose degree is not higher than 2(d-1), and the result of the operation is an inner product of the first vector and the second vector. 4. A cryptographic processing method comprising: generating a first encrypted polynomial by encrypting, by a cryptographic processing device, a first polynomial that corresponds to a first binary vector obtained by performing a binary transformation on elements of a first vector; and transmitting, by the cryptographic processing device, cryptographic information that represents the first encrypted polynomial to a cryptographic operation device that multiplies the first encrypted polynomial by a second encrypted polynomial to generate a third encrypted polynomial, wherein the cryptographic processing device or another cryptographic processing device generates the second encrypted polynomial by encrypting a second polynomial that corresponds to a second binary vector obtained by performing a binary transformation on elements of a second vector, and wherein an analysis device obtains a result of an operation of the first vector and the second vector by assigning 2 to a variable in a prescribed portion of a third polynomial obtained by decrypting the third encrypted polynomial. 5. The cryptographic processing method according to claim 4 , wherein the generating the first encrypted polynomial generates the first binary vector by transforming each of the elements of the first vector into a bit string including a plurality of bits and by inserting a bit string including a plurality of bit values that represent a plurality of zeros between two bit strings that correspond to two of the elements of the first vector. 6. The cryptographic processing method according to claim 5 , wherein the number of bits in the bit string including the bit value that represents the plurality of zeros is equal to the number of bits d in the bit string including the plurality of bits, the prescribed portion of the third polynomial corresponds to terms that are included in the third polynomial and whose degree is not higher than 2(d-1), and the result of the operation is an inner product of the first vector and the second vector. 7. A non-transitory computer-readable recording medium having stored therein a cryptographic processing program for causing a computer to execute a cryptographic process comprising: generating a first encrypted polynomial by encrypting a first polynomial that corresponds to a first binary vector obtained by performing a binary transformation on elements of a first vector; and transmitting cryptographic information that represents the first encrypted polynomial to a cryptographic operation device that multiplies the first encrypted polynomial by a second encrypted polynomial to generate a third encrypted polynomial, wherein the computer or a cryptographic processing device generates the second encrypted polynomial by encrypting a second polynomial that corresponds to a second binary vector obtained by performing a binary transformation on elements of a second vector, and wherein an analysis device obtains a result of an operation of the first vector and the second vector by assigning 2 to a variable in a prescribed portion of a third polynomial obtained by decrypting the third encrypted polynomial. 8. The non-transitory computer-readable recording medium according to claim 7 , wherein the generating the first encrypted polynomial generates the first binary vector by transforming each of the elements of the first vector into a bit string including a plurality of bits and by inserting a bit string including a plurality of bit values that represent a plurality of zeros between two bit strings that correspond to two of the elements of the first vector. 9. The non-transitory computer-readable recording medium according to claim 8 , wherein the number of bits in the bit string including the bit value that represents the plurality of zeros is equal to the number of bits d in the bit string including the plurality of bits, the prescribed portion of the third polynomial corresponds to terms that are included in the third polynomial and whose degree is not higher than 2(d-1), and the result of the operation is an inner product of the first vector and the second vector.

Assignees

Inventors

Classifications

  • using a plurality of keys or algorithms · CPC title

  • H04L9/3093Primary

    involving Lattices or polynomial equations, e.g. NTRU scheme · CPC title

  • Key scheduling, i.e. generating round keys or sub-keys for block encryption · CPC title

  • H04L9/008Primary

    involving homomorphic encryption · CPC title

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What does patent US9794068B2 cover?
A memory stores therein a first vector. A processor generates a first encrypted polynomial by encrypting a first polynomial that corresponds to a first binary vector obtained by performing a binary transformation on elements of the first vector. A transmitter transmits to a cryptographic operation device cryptographic information that represents the first encrypted polynomial. The cryptographic…
Who is the assignee on this patent?
Fujitsu Ltd
What technology area does this patent fall under?
Primary CPC classification H04L9/3093. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Oct 17 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).