Semiconductor device and display device

Patent metadata

Field	Value
Publication number	US-9793801-B2
Application number	US-201113110303-A
Country	US
Kind code	B2
Filing date	May 18, 2011
Priority date	May 21, 2010
Publication date	Oct 17, 2017
Grant date	Oct 17, 2017

Abstract

An object is to reduce power consumption of a semiconductor device including a DC-DC converter circuit. The semiconductor device includes a DC-DC converter circuit and a microprocessor. The DC-DC converter circuit includes a conversion circuit including an inductor and a transistor, and a control circuit including a comparison circuit and a logic circuit. In the control circuit, the comparison circuit compares an output of the conversion circuit and a reference value, and the logic circuit performs an arithmetic operation between an output of the comparison circuit and a clock signal of the microprocessor. In the conversion circuit, the transistor controls a current flowing through the inductor in accordance with an output of the logic circuit, and the output of the conversion circuit is generated in accordance with the current flowing through the inductor.

First claim

The invention claimed is:

1. A semiconductor device comprising:
a display panel;
a driver circuit configured to drive the display panel;
a microprocessor configured to distinguish still image data and moving image data contained in electronic data to be displayed by the display panel; and
a DC-DC converter circuit electrically connected to the driver circuit and comprising:
a conversion circuit comprising:
an inductor; and
a transistor comprising a drain terminal and a source terminal, one of which is connected to the inductor;

a comparison circuit comprising an input terminal electrically connected to an output terminal of the conversion circuit so that a voltage applied to the input terminal can be proportional to a voltage of the output terminal of the conversion circuit, the output terminal being configured to output an output voltage of the DC-DC converter circuit; and
a logic circuit configured to perform an arithmetic operation and comprising a first input terminal electrically connected to an output terminal of the comparison circuit, a second input terminal electrically connected to an output of the microprocessor, and an output terminal electrically connected to a gate of the transistor so that a current output by the logic circuit can be input to the gate of the transistor, the logic circuit being an AND circuit,

wherein the semiconductor device is configured to input a clock signal to the second input terminal of the logic circuit, and
wherein the display panel is configured to control the DC-DC converter circuit to perform a hysteresis control when still image data are to be displayed and a pulse width modulation control when moving image data are to be displayed.

2. A display device comprising:
a display panel;
a driver circuit configured to drive the display panel;
a microprocessor configured to distinguish still image data and moving image data contained in electronic data to be displayed by the display panel; and
a DC-DC converter circuit electrically connected to the driver circuit and to an output of the microprocessor, the DC-DC converter circuit comprising:
a conversion circuit;
a comparison circuit comprising an input terminal electrically connected to an output terminal of the conversion circuit, the output terminal being configured to output an output voltage of the DC-DC converter circuit; and
a logic circuit configured to perform an arithmetic operation and comprising a first input terminal electrically connected to an output terminal of the comparison circuit and a second input terminal, the logic circuit being an AND circuit,

wherein an output terminal of the logic circuit is electrically connectable to an input terminal of the conversion circuit,
wherein the microprocessor is configured to output a clock signal to the second input terminal of the logic circuit,
wherein the display panel is configured to be driven in accordance with an output voltage of the DC-DC converter circuit,
wherein the display panel is configured to control the DC-DC converter circuit to perform a hysteresis control when still image data are to be displayed and a pulse width modulation control when moving image data are to be displayed, and
wherein the display device is configured to connect the output terminal of the logic circuit to the input terminal of the conversion circuit when performing the hysteresis control.

3. A semiconductor device comprising:
a display panel;
a driver circuit configured to drive the display panel, and
a DC-DC converter circuit, the DC-DC converter circuit comprising:
a conversion circuit comprising:
an inductor; and
a transistor comprising a drain terminal and a source terminal, one of which is connected to the inductor;

an amplification circuit electrically connected to an output terminal of the conversion circuit;
a first multiplexer comprising a first input terminal electrically connected to the output terminal of the conversion circuit so that a voltage applied to the first input terminal can be proportional to a voltage of the output terminal of the conversion circuit, and a second input terminal electrically connected to an output terminal of the amplification circuit;
a comparison circuit comprising an input terminal electrically connected to an output terminal of the first multiplexer;
a logic circuit configured to perform an arithmetic operation and comprising a first input terminal electrically connected to an output terminal of the comparison circuit and a second input terminal, the logic circuit being an AND circuit; and
a second multiplexer comprising a first input terminal electrically connected to an output terminal of the logic circuit, a second input terminal electrically connected to an output terminal of the comparison circuit, and an output terminal electrically connected to a gate of the transistor, and

a microprocessor configured to output a clock signal to the second input terminal of the logic circuit,
wherein a current output by the logic circuit can be input to the gate of the transistor via the second multiplexer,
wherein the microprocessor is configured to distinguish still image data and moving image data contained in electronic data to be displayed by the display panel, and
wherein the display panel is configured to control the DC-DC converter circuit to perform a hysteresis control when still image data are to be displayed and a pulse width modulation control when moving image data are to be displayed.

4. A semiconductor device according to claim 1 , wherein the microprocessor is configured to output the clock signal to the second input terminal of the logic circuit.

5. A semiconductor device according to claim 1 ,
wherein the semiconductor device is a display device comprising a second transistor in a pixel, the second transistor comprising an oxide semiconductor layer.

6. A display device according to claim 2 , further comprising a transistor in a pixel, the transistor comprising an oxide semiconductor layer.

7. A display device according to claim 2 , further comprising a transistor in a pixel, the transistor comprising an oxide semiconductor layer.

8. A semiconductor device according to claim 1 , further comprising a load electrically connected to an output of the DC-DC converter circuit,
wherein the input terminal of the comparison circuit is electrically connected to the output terminal of the conversion circuit in accordance with a signal input into the load.

9. A semiconductor device according to claim 3 ,
wherein a third input terminal of the first multiplexer and a third input terminal of the second multiplexer are connected to a control wiring.

10. A semiconductor device according to claim 1 ,
wherein a multiplexer is interposed between the output terminal of the logic circuit and the gate of the transistor.

11. A semiconductor device according to claim 1 ,
wherein a multiplexer is interposed between the input terminal of the comparison circuit and the output terminal of the conversion circuit.

12. A semiconductor device according to claim 1 ,
wherein the comparison circuit is configured to compare an output of the conversion circuit with a reference signal;
wherein the logic circuit is configured to perform the arithmetic operation between an output of the comparison circuit and the clock signal; and
wherein in the conversion circuit, the transistor is configured to control a current flowing through the inductor in accordance with an output of the logic circuit, and the output of the conversion circuit is generated in accordance with the current flowing through the inductor.

13. A semiconductor device according to

Assignees

• Takahashi Kei
• Ito Yoshiaki
• Semiconductor Energy Lab

Inventors

• Takahashi Kei
• Ito Yoshiaki

Classifications

• H02M3/157

  with digital control · CPC title

• H02M3/158 Primary

  including plural semiconductor devices as final control devices for a single load · CPC title

• H02M2001/0048

  Electricity · mapped topic

• Y02B70/1491

  Cross-Sectional Technologies · mapped topic

• H02M1/0048

  Circuits or arrangements for reducing losses (using snubbers H02M1/34) · CPC title