TVS structures for high surge and low capacitance

US9793254B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9793254-B2
Application numberUS-201414565392-A
CountryUS
Kind codeB2
Filing dateDec 9, 2014
Priority dateDec 9, 2014
Publication dateOct 17, 2017
Grant dateOct 17, 2017

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  1. Title

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  2. Abstract

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  5. First independent claim

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Abstract

Official abstract text for this publication.

A transient voltage suppressing (TVS) device formed in an epitaxial layer of a first conductivity type supported on a semiconductor substrate. The TVS device further comprises a plurality of contact trenches opened and extended to a lower part of the epitaxial layer filled with a doped polysilicon layer of a second conductivity type wherein the trenches are further surrounded by a heavy dopant region of the second conductivity type. The TVS device further includes a metal contact layer disposed on a top surface of the epitaxial layer electrically connected to a Vcc electrode wherein the metal contact layer further directly contacting the doped polysilicon layer and the heavy dopant region of the second conductivity type.

First claim

Opening claim text (preview).

We claim: 1. A transient voltage suppressing (TVS) device formed in an epitaxial layer of a first conductivity type supported on a semiconductor substrate, and the TVS device further comprising: a plurality of contact trenches opened and extended into the epitaxial layer of the first conductivity type wherein the contact trenches are filled with a doped polysilicon layer of a second conductivity type and wherein the contact trenches are further surrounded by a heavy dopant region of the second conductivity type to form a P-N junction with the epitaxial layer of the first conductivity type; and a metal contact layer disposed on a top surface of the epitaxial layer of the first conductivity type electrically connected to a Vcc electrode wherein the metal contact layer further directly contacting the doped polysilicon layer and the heavy dopant region of the second conductivity type. 2. The transient voltage suppressing (TVS) device of claim 1 wherein: the epitaxial layer is a P-type epitaxial layer and the contact trenches are filled with an N-doped polysilicon layer surrounded by an N-type heavy dopant region to form the P-N junction with the P-type epitaxial layer. 3. The transient voltage suppressing (TVS) device of claim 1 wherein: the epitaxial layer is an N-type epitaxial layer and the contact trenches are filled with a P-doped polysilicon layer surrounded by a P-type heavy dopant region to form the P-N junction with the N-type epitaxial layer. 4. The transient voltage suppressing (TVS) device of claim 1 wherein: the contact trenches are filled with a N-doped polysilicon layer surrounded by a N-type heavy dopant region to form the P-N junction with a P-type epitaxial layer; and the contact metal layer is electrically connected to a cathode electrode. 5. The transient voltage suppressing (TVS) device of claim 1 further comprising: a top dopant layer of the second conductivity type disposed near the top of said epitaxial layer of the first conductivity type; a buried dopant region of the second conductivity type disposed below the contact trenches and encompassed in the epitaxial layer; wherein said buried dopant region interfacing with an underlying portion of said epitaxial layer to constitute a Zener diode for said TVS device; and a first contact region of the first conductivity type disposed on the top of said top dopant layer of the second conductivity type over said buried dopant region, wherein the first contact region of the first conductivity type, the top dopant layer of the second conductivity type, the epitaxial layer of the first conductivity type, and the buried dopant region of the second conductivity type constitute a vertical semiconductor controlled rectifier (SCR) to function as a first steering diode of the TVS device and wherein the first contact region of the first conductivity type is disposed at a distance away and insulated from the contact trenches, and the buried dopant region of the second conductivity type further extends laterally and merges with the heavy dopant regions of the second conductivity type below the contact trenches. 6. The transient voltage suppressing (TVS) device of claim 5 further comprising: a plurality of isolation trenches isolating a section of said epitaxial layer of the first conductivity type and the top dopant layer of the second conductivity type for isolating said SCR from the contact trenches. 7. The transient voltage suppressing (TVS) device of claim 5 further comprising: a second contact region of the second conductivity type disposed at the top of said top dopant layer of the first conductivity type and laterally in opposite side of the contact trenches from the SCR and first steering diode wherein said second contact region interfacing with the top dopant layer for functioning as a second steering diode for functioning with said first steering diode as a pair of steering diodes of said TVS device. 8. The transient voltage suppressing (TVS) device of claim 5 further comprising: a second steering diode formed laterally away from the SCR and first steering diode, wherein said first and second steering diodes form a pair of a high side steering diode and a low side steering diode on two opposite sides of the contact trenches surrounded by the dopant regions of the second conductivity type. 9. The transient voltage suppressing (TVS) device of claim 8 wherein: the second steering diode further includes a part of the top dopant layer of the second conductivity type for reducing the capacitance of said second steering diode. 10. The TVS device of claim 8 wherein: the first and second steering diodes are connected to an input/output (I/O) pad through the first and second contact regions of the first conductivity type, respectively, disposed near the top surface of the top dopant layer of the second conductivity type. 11. The TVS device of claim 8 further comprising: isolation trenches surrounding the first and second steering diodes for insulating the first and second steering diodes disposed on two opposite sides of the contact trenches. 12. The transient voltage suppressing (TVS) device of claim 8 wherein: the first steering diode, the said second steering diode and the contact trenches are separated by at least one isolation trench. 13. The transient voltage suppressing (TVS) device of claim 5 further comprising: a voltage breakdown (VBD) trigger zone formed with a high dopant concentration of the second conductivity type in a Zener diode overlapping zone disposed in the epitaxial layer below said buried dopant region to control a voltage breakdown. 14. The transient voltage suppressing (TVS) device of claim 1 further comprising: an insulation layer covering a top surface of the semiconductor substrate having contact openings filled with a metal contact layer to contact the contact trenches. 15. The transient voltage suppressing (TVS) device of claim 1 wherein: said first conductivity type is P-type; and said semiconductor substrate is electrically connected to a ground voltage (GND) terminal.

Assignees

Inventors

Classifications

  • of conductive or resistive materials · CPC title

  • of conductive parts of the interconnections · CPC title

  • Interconnections within wafers or substrates, e.g. through-silicon vias [TSV] · CPC title

  • Local interconnections · CPC title

  • being Group IV materials, e.g. B-doped Si or undoped Ge · CPC title

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What does patent US9793254B2 cover?
A transient voltage suppressing (TVS) device formed in an epitaxial layer of a first conductivity type supported on a semiconductor substrate. The TVS device further comprises a plurality of contact trenches opened and extended to a lower part of the epitaxial layer filled with a doped polysilicon layer of a second conductivity type wherein the trenches are further surrounded by a heavy dopant …
Who is the assignee on this patent?
Bobde Madhur, Zeng Wenjiang, Weng Limin, and 1 more
What technology area does this patent fall under?
Primary CPC classification H01L27/0248. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Oct 17 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).