Semiconductor element built-in wiring board and method for manufacturing the same

Patent metadata

Field	Value
Publication number	US-9793219-B2
Application number	US-201615040129-A
Country	US
Kind code	B2
Filing date	Feb 10, 2016
Priority date	Feb 10, 2015
Publication date	Oct 17, 2017
Grant date	Oct 17, 2017

Abstract

A wiring board includes a base substrate, a semiconductor element embedded in the substrate and having active and non-active surfaces such that the semiconductor has a terminal on the active surface, a first build-up layer including an insulating layer and first conductor pads such that the first conductor pads have exposed surfaces exposed from a surface of the insulating layer on the opposite side with respect to the substrate, and a second build-up layer including an insulating layer and second conductor pads such that the second conductor pads have exposed surfaces exposed from a surface of the insulating layer on the opposite side with respect to the substrate. The insulating layer in the first build-up includes resin material and reinforcing material, the insulating layer in the second build-up includes resin material and reinforcing material, and the first conductor pads is embedded in the insulating layer in the first build-up.

First claim

What is claimed is:

1. A wiring board having a built-in semiconductor element, comprising:
a base substrate;
a semiconductor element embedded in the base substrate and having an active surface and a non-active surface on an opposite side with respect to the active surface such that the semiconductor element has a terminal on the active surface;
a first build-up layer comprising an insulating layer and a plurality of first conductor pads such that the insulating layer is formed on a non-active surface side of the semiconductor element and that the plurality of first conductor pads has a plurality of exposed surfaces exposed from a surface of the insulating layer on an opposite side with respect to the base substrate; and
a second build-up layer comprising an insulating layer and a plurality of second conductor pads such that the insulating layer is formed on an active surface side of the semiconductor element and that the plurality of second conductor pads has a plurality of exposed surfaces exposed from a surface of the insulating layer on an opposite side with respect to the base substrate,
wherein the insulating layer in the first build-up layer comprises a resin material and a reinforcing material, the insulating layer in the second build-up layer comprises a resin material and a reinforcing material, the plurality of first conductor pads is embedded in the insulating layer in the first build-up layer, the base substrate comprises a first conductor layer and a plane layer formed on the first build-up layer, a first base-substrate insulating layer formed on the first build-up layer and covering the first conductor layer and plane layer, a second conductor layer formed on the first base-substrate insulating layer, a second base-substrate insulating layer formed on the first base-substrate insulating layer and covering the second conductor layer, and a third base-substrate insulating layer formed on the second base-substrate insulating layer such that no conductor layer is interposed between the second base-substrate insulating layer and the third base-substrate insulating layer, the base substrate has a recess portion penetrating through the first and second base-substrate insulating layers such that the recess portion is exposing a portion of the plane layer and accommodating the semiconductor element in the recess portion, and the third base-substrate insulating layer is formed such that the third base-substrate insulating layer is embedding the semiconductor element in the recess portion.

2. A wiring board having a built-in semiconductor element according to claim 1 , wherein the plurality of first conductor pads is formed such that the exposed surfaces of the first conductor pads and the surface of the insulating layer in the first build-up layer are on a same plane.

3. A wiring board having a built-in semiconductor element according to claim 1 , wherein the plurality of first conductor pads is formed such that the exposed surfaces of the first conductor pads are recessed from the surface of the insulating layer in the first build-up layer.

4. A wiring board having a built-in semiconductor element according to claim 1 , wherein the plurality of first conductor pads is formed such that the exposed surfaces of the first conductor pads are recessed in a range of 3 μm to 15 μm from the surface of the insulating layer in the first build-up layer.

5. A wiring board having a built-in semiconductor element according to claim 1 , wherein the insulating layers in the first and second build-up layers are made of a same material.

6. A wiring board having a built-in semiconductor element according to claim 1 , wherein the insulating layer in the first build-up layer comprises the reinforcing material comprising at least one material selected from the group consisting of a glass cloth, a carbon fiber, a glass nonwoven fabric, an aramid cloth and an aramid nonwoven fabric, and the insulating layer in the second build-up layer comprises the reinforcing material comprising at least one material selected from the group consisting of a glass cloth, a carbon fiber, a glass nonwoven fabric, an aramid cloth and an aramid nonwoven fabric.

7. A wiring board having a built-in semiconductor element according to claim 1 , wherein the first build-up layer comprises a plurality of insulating layers and a plurality of wiring layers formed on the plurality of insulating layers, respectively, and the second build-up layer comprises a plurality of insulating layers and a plurality of wiring layers formed on the plurality of insulating layers, respectively.

8. A wiring board having a built-in semiconductor element according to claim 1 , wherein each of the first, second and third base-substrate insulating layers comprises a resin material and inorganic filler in an amount of 30% wt. to 80% wt. in the resin material.

9. A wiring board having a built-in semiconductor element according to claim 1 , wherein the second base-substrate insulating layer has a thickness which is smaller than a thickness of each of the first and third base-substrate insulating layers.

10. A wiring board having a built-in semiconductor element according to claim 1 , wherein the base substrate is formed such that a height at which the second base-substrate insulating layer is formed is lower than a height of the semiconductor element accommodated in the recess portion of the base substrate.

11. A wiring board having a built-in semiconductor element according to claim 1 , wherein the plane layer comprises a copper foil, an electroless plating layer and an electrolytic plating layer.

12. A wiring board having a built-in semiconductor element according to claim 1 , wherein the plane layer forms a ground layer.

13. A wiring board having a built-in semiconductor element according to claim 1 , further comprising:
a stack via structure comprising a plurality of via conductors formed through the first build-up layer, the base substrate and the second build-up layer such that the plurality of via conductors is stacked substantially in a linear form.

14. A wiring board having a built-in semiconductor element according to claim 1 , further comprising:
a first solder resist layer formed on the first build-up layer and having a plurality of opening portions such that the plurality of opening portions is exposing the plurality of first conductor pads, respectively; and
a second solder resist layer formed on the second build-up layer and having a plurality of opening portions such that the plurality of opening portions is exposing the plurality of second conductor pads, respectively.

15. A wiring board having a built-in semiconductor element according to claim 1 , wherein the base substrate is formed such that the base substrate includes a conductor layer formed on the third base-substrate insulating layer.

16. A wiring board having a built-in semiconductor element according to claim 15 , wherein the base substrate is formed such that the base substrate includes a via conductor penetrating through the second and third base-substrate insulating layers and connecting the second conductor layer and the conductor layer formed on the third base-substrate insulating layer.

Assignees

• Ibiden Co Ltd

Inventors

• Shimizu Keisuke

Classifications

• H10W70/682

  comprising holes having chips therein · CPC title

• H10W90/722

  between stacked chips · CPC title

• H10W70/099

  Connecting interconnections to insulating or insulated package substrates, interposers or redistribution layers · CPC title

• H10W72/874

  On different surfaces · CPC title

• H10W72/9413

  on encapsulations · CPC title