Neural network circuit and learning method for neural network circuit

US9792547B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9792547-B2
Application numberUS-201514641835-A
CountryUS
Kind codeB2
Filing dateMar 9, 2015
Priority dateMar 18, 2014
Publication dateOct 17, 2017
Grant dateOct 17, 2017

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  1. Title

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  5. First independent claim

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Abstract

Official abstract text for this publication.

A neural network circuit includes an error calculating circuit that generates an error voltage signal having a magnitude in accordance with a time difference between an output signal and a teaching signal corresponding to the output signal. A weight change pulse voltage signal is input to a synapse circuit of a neural network circuit element including a neuron circuit that output the weight change pulse voltage signal, and a switching pulse voltage signal is input to a synapse circuit of a neural network circuit element other than the neural network circuit element including the neuron circuit that output the switching pulse voltage signal. The neural network circuit element changes the amplitude of the weight change pulse voltage signal on the basis of the error voltage signal generated by the error calculating circuit.

First claim

Opening claim text (preview).

What is claimed is: 1. A neural network circuit comprising: a plurality of neural network circuit elements; an error calculating circuit; at least one input signal terminal; and at least one output signal terminal, wherein at least one output signal output from the at least one output signal terminal is obtained from an input signal input to the at least one input signal terminal, wherein the error calculating circuit receives the at least one output signal and teaching signals equal in number to a number of the at least one output signal terminal and generates an error voltage signal representing a voltage signal having an amplitude in accordance with a time difference between an output signal and a teaching signal corresponding to one of the least one output signal, wherein each of the neural network circuit elements includes at least one synapse circuit and a neuron circuit, wherein the synapse circuit includes a variable resistive element having a resistance value that varies when a pulse voltage is applied, wherein the neuron circuit includes a waveform generating circuit, and the waveform generating circuit generates a weight change pulse voltage signal having a predetermined first waveform that rises from a reference value to a predetermined peak value and then falls again to the reference value as time passes and a switching pulse voltage signal having a predetermined second waveform that determines a predetermined duration, wherein the weight change pulse voltage signal is input to the synapse circuit of the neural network circuit element including the neuron circuit that outputs the weight change pulse voltage signal, wherein the switching pulse voltage signal is input to the synapse circuit of the neural network circuit element other than the neural network circuit element including the neuron circuit that outputs the switching pulse voltage signal, wherein the neural network circuit element changes an amplitude of the weight change pulse voltage signal on the basis of the error voltage signal generated by the error calculating circuit, and wherein for the predetermined duration of the switching pulse voltage signal input from the neural network circuit element other than the neural network circuit element including the synapse circuit, the synapse circuit changes the resistance value of the variable resistive element of the synapse circuit using a voltage in accordance with a time difference between the switching pulse voltage signal and the weight change pulse voltage signal generated by the neuron circuit of the neural network circuit element including the synapse circuit. 2. The neural network circuit according to claim 1 , wherein if the time difference between the teaching signal and the output signal is zero, the teaching signal has a reference potential, wherein if the time difference between the teaching signal and the output signal is within a predetermined range and a center potential is defined as the reference potential, the potential difference of the teaching signal from the center potential increases with increasing time difference in a bipolar manner, and wherein if the time difference between the teaching signal and the output signal is outside the predetermined range, an amplitude of the teaching signal is maintained at a maximum value of the potential difference obtained in the predetermined range in a bipolar manner. 3. The neural network circuit according to claim 1 , wherein the error calculating circuit includes time difference calculating circuits equal in number to the number of the output signal terminals and a summing circuit, wherein each of the time difference calculating circuits generates the error voltage signal in accordance with a time difference between the output signal output from the corresponding output signal terminal and the teaching signal corresponding to the output signal and inputs the error voltage signal to the neuron circuit included in the neural network circuit element having an output signal that is the same as the output signal output from the output signal terminal, wherein the summing circuit generates a sum voltage signal obtained by summing the error voltage signals generated by the time difference calculating circuits and inputs the sum voltage signal to the neuron circuit included in the neural network circuit element having an output signal that is not the same as the output signal output from the output signal terminal. 4. The neural network circuit according to claim 1 , wherein the variable resistive element includes a first terminal, a second terminal, and a third terminal, wherein a constant voltage based on the switching pulse voltage signal input from the neural network circuit element other than the neural network circuit element including the variable resistive element is applied between the first terminal and the second terminal, wherein a voltage in accordance with a time difference between the switching pulse voltage signal and the weight change pulse voltage signal generated by the neuron circuit of the neural network circuit element including the variable resistive element is applied between the first terminal and the third terminal for the predetermined duration of the switching pulse voltage signal input from the neural network circuit element other than the neural network circuit element including the variable resistive element, and wherein a resistance value between the first terminal and the second terminal varies in accordance with a potential difference between the first terminal and the third terminal. 5. The neural network circuit according to claim 4 , wherein the synapse circuit includes a first switch that connects and disconnects the third terminal of the variable resistive element from a terminal to which the weight change pulse voltage signal generated by the neuron circuit of the neural network circuit element including the variable resistive element is input, and wherein the first switch controls the connection and disconnection on the basis of the switching pulse voltage signal input from the neural network circuit element other than the neural network circuit element including the variable resistive element. 6. The neural network circuit according to claim 4 , wherein the variable resistive element is a ferroelectric memristor. 7. The neural network circuit according to claim 6 , wherein the ferroelectric memristor includes a control electrode formed on a substrate, a ferroelectric layer in contact with the control electrode, a semiconductor layer formed on the ferroelectric layer, and a first electrode and a second electrode formed on the semiconductor layer, and wherein a resistance value between the first electrode and the second electrode varies in accordance with a potential difference between the first electrode and the control electrode. 8. The neural network circuit according to claim 1 , wherein the neuron circuit includes an integration circuit that integrates a value of an electric current flowing in the variable resistive element of the synapse circuit and a waveform generating circuit that generates the first waveform and the second waveform in accordance with the electric current integrated by the integration circuit, and wherein the waveform generating circuit includes a multiplier circuit that multiplies a magnitude of the first waveform by a magnitude of the error voltage signal. 9. The neural network circuit according to claim 4 , wherein the synapse circuit includes a second switch having one end connected to a first reference voltage source and the other end connected to the first terminal of the variable resistive element, and wherein the second switch connects the first reference voltage sourc

Assignees

Inventors

Classifications

  • using electronic means · CPC title

  • G06N3/084Primary

    Backpropagation, e.g. using gradient descent · CPC title

  • Analogue means · CPC title

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What does patent US9792547B2 cover?
A neural network circuit includes an error calculating circuit that generates an error voltage signal having a magnitude in accordance with a time difference between an output signal and a teaching signal corresponding to the output signal. A weight change pulse voltage signal is input to a synapse circuit of a neural network circuit element including a neuron circuit that output the weight cha…
Who is the assignee on this patent?
Panasonic Ip Man Co Ltd
What technology area does this patent fall under?
Primary CPC classification G06N3/084. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Oct 17 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).