Array substrate, liquid crystal display panel and display device

Patent metadata

Field	Value
Publication number	US-9791735-B2
Application number	US-201314387972-A
Country	US
Kind code	B2
Filing date	Nov 29, 2013
Priority date	Jun 8, 2013
Publication date	Oct 17, 2017
Grant date	Oct 17, 2017

Abstract

An array substrate, a liquid crystal display panel and a display device with a simple structure are provided. The array substrate includes: a substrate; a plurality of sub-pixel units, located on the substrate and arranged in a matrix form; and a plurality of photoluminescent devices, located in the plurality of sub-pixel units, and emitting light with a corresponding color in correspondence with a color of the sub-pixel unit where it is located.

First claim

The invention claimed is:

1. An array substrate, comprising:
a substrate;
a thin film transistor, formed on the substrate and comprising a source electrode, a drain electrode, a gate electrode and an active layer;
a pixel electrode, formed on the substrate;
a plurality of sub-pixel units, located on the substrate and arranged in a matrix form;
a plurality of photoluminescent devices, each of which is located in a corresponding sub-pixel unit of the plurality of sub-pixel units, and each of which emits light with a corresponding color in correspondence with a color of the sub-pixel unit where it is located, wherein the plurality of photoluminescent devices are disposed in a same layer;
a planarization layer located above the plurality of photoluminescent devices; and
a black matrix disposed on a side of the planarization layer facing the liquid crystal layer, the black matrix being located in a non-display region between adjacent sub-pixel units.

2. The array substrate claimed as claim 1 , wherein, each of the photoluminescent devices is a light-emitting film layer for emitting light with a corresponding color in correspondence with the sub-pixel unit where it is located, and the light-emitting film layer is an insulating layer.

3. The array substrate claimed as claim 2 , wherein, each of the light-emitting film layers is formed of quantum dot light-emitting material for emitting light with a color in correspondence with the sub-pixel unit where it is located.

4. The array substrate claimed as claim 3 , wherein, the quantum dot light-emitting material is formed of group II-VI or group III-V elements.

5. The array substrate claimed as claim 4 , wherein, the quantum dot light-emitting material formed of group II-VI elements is CdS, CdSe, CdTe, ZnO, ZnS, ZnSe, ZnTe or ZnCdS, and the quantum dot light-emitting material formed of group III-V elements is GaAs, GaP, GaAs, GaSb, HgS, HgSe, HgTe, InAs, InP, InSb, AIAs, AIP, AlSb or InAlAs.

6. The array substrate claimed as claim 2 , wherein, the light-emitting film layer covers an entire region of the sub-pixel unit where it is located.

7. The array substrate claimed as claim 2 , wherein, the light-emitting film layer is disposed in a setting region of the pixel electrode and the thin film transistor of the sub-pixel unit where it is located, a setting region of the pixel electrode, or a part of the setting region of the pixel electrode.

8. The array substrate claimed as claim 2 , further comprising: a gate insulating layer and a passivation layer covering the thin film transistor, wherein the light-emitting film layer is located at a side of the gate insulating layer or the passivation layer far away from the substrate; or the light-emitting film layer, and the gate insulating layer or the passivation layer are the same film layer.

9. The array substrate claimed as claim 8 , wherein, a protective layer is further provided at a side of the light-emitting film layer far away from the substrate.

10. The array substrate claimed as claim 8 , wherein, under a condition that the light-emitting film layer, and the gate insulating layer or the passivation layer are the same film layer, the gate insulating layer or the passivation layer is formed of photoluminescent material or is formed of silicon nitride and/or silicon oxide as well as photoluminescent material.

11. The array substrate claimed as claim 2 , wherein, under a condition that the light-emitting film layer and the gate insulating layer or the passivation layer are the same film layer, the gate insulating layer or the passivation layer is a silicon nitride and/or silicon oxide layer, and a quantum dot for emitting a light with a corresponding color is formed in a region of the silicon nitride and/or silicon oxide layer corresponding to each of the sub-pixel units.

12. A liquid crystal display panel, comprising:
a first substrate;
a second substrate, being the array substrate claimed as claim 1 , wherein the second substrate is cell-assembled with the first substrate;
a liquid crystal layer, interposed between the first substrate and the second substrate;
a common electrode, located at a side of the first substrate or the second substrate facing the liquid crystal layer.

13. The liquid crystal display panel claimed as claim 12 , wherein the common electrode is located in the second substrate and located above the pixel electrode, the common electrode is a slit-like electrode, and the pixel electrode is a plate-like electrode.

14. The liquid crystal display panel claimed as claim 12 , wherein the common electrode is located in the second substrate and located below the pixel electrode, the pixel electrode is a slit-like electrode, and the common electrode is a plate-like electrode.

15. The liquid crystal display panel claimed as claim 12 , further comprising:
alignment layers, disposed at sides of the first substrate and the second substrate facing the liquid crystal layer, respectively;
an upper polarizer, disposed at a side of the first substrate facing away from the liquid crystal layer; and
a lower polarizer, disposed at a side of the second substrate facing away from the liquid crystal layer.

16. A display device, comprising:
a liquid crystal display panel, claimed as claim 12 ; and
a backlight source, disposed at a light entering side of the liquid crystal display panel.

17. An array substrate, comprising:
a substrate;
a thin film transistor, formed on the substrate and comprising a source electrode, a drain electrode, a gate electrode and an active layer;
a pixel electrode, formed on the substrate;
a plurality of sub-pixel units, located on the substrate and arranged in a matrix form;
a plurality of photoluminescent devices, each of which is located in a corresponding sub-pixel unit of the plurality of sub-pixel units, and each of which emits light with a corresponding color in correspondence with a color of the sub-pixel unit where it is located;
a planarization layer located above the plurality of photoluminescent devices; and
a black matrix disposed on a side of the planarization layer facing the liquid crystal layer, the black matrix being located in a non-display region between adjacent sub-pixel units.

18. The array substrate claimed as claim 17 , wherein, each of the photoluminescent devices is a light-emitting film layer for emitting light with a corresponding color in correspondence with the sub-pixel unit where it is located, and the light-emitting film layer is an insulating layer.

19. The array substrate claimed as claim 18 , wherein, each of the light-emitting film layers is formed of quantum dot light-emitting material for emitting light with a color in correspondence with the sub-pixel unit where it is located.

20. The array substrate claimed as claim 19 , wherein, the quantum dot light-emitting material is formed of group II-VI or group III-V elements.

Assignees

• Boe Technology Group Co Ltd
• Beijing Boe Optoelectronics Tech Co Ltd

Inventors

• Ma Lei

Classifications

• H10H29/8552

  Light absorbing arrangements, e.g. black matrix · CPC title

• H10H29/142

  Two-dimensional arrangements, e.g. asymmetric LED layout · CPC title

• H10H20/812

  within the light-emitting regions, e.g. having quantum confinement structures · CPC title

• G02F2001/134345

  Physics · mapped topic

• G02F1/133528

  Polarisers · CPC title