Passive alignment of polymer waveguides

US9791642B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9791642-B2
Application numberUS-201715436934-A
CountryUS
Kind codeB2
Filing dateFeb 20, 2017
Priority dateSep 9, 2015
Publication dateOct 17, 2017
Grant dateOct 17, 2017

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A chip packaging includes a first part comprising a support; and a core polymer layer transversally structured so as to exhibit distinct residual portions comprising: first waveguide cores each having a first height and disposed within said inner region; and one or more first alignment structures disposed within said outer region. A second part of the packaging comprises: second waveguide cores, each having a same second height; and one or more second alignment structures complementarily shaped with respect to the one or more first alignment structures, and wherein, the first part structured such that said inner region is recessed with respect to the outer region, to enable: the second waveguide cores to contact the first waveguide cores; and the one or more second alignment structures to respectively receive, at least partly, the one or more first alignment structures. The invention is further directed to related passive alignment methods.

First claim

Opening claim text (preview).

The invention claimed is: 1. A chip packaging comprising a first part and a second part, wherein the first part comprises: a support; a core polymer layer extending over an inner region and an outer region of the support, the core polymer layer transversally structured so as to exhibit distinct residual portions, each having a same first height, which corresponds to a thickness of the core polymer layer, the residual portions comprising: first waveguide cores disposed within said inner region, one or more first alignment structures disposed within said outer region; and wherein the support comprises one or more additional polymer cladding portions extending over a polymer cladding layer, the outer region defined on the one or more additional polymer cladding portions, so as for the inner region to be recessed with respect to the outer region; the second part comprises: second waveguide cores, each having a same second height; and one or more second alignment structures complementarily shaped with respect to the one or more first alignment structures; wherein the first part is structured such that said inner region is recessed with respect to the outer region, to enable: the second waveguide cores to contact the first waveguide cores; the one or more second alignment structures to respectively receive, at least partly, the one or more first alignment structures; and wherein the inner region and the outer region are each planar and structurally contiguous. 2. A method for passively aligning two parts of a chip packaging, the method comprising: providing a first part comprising: a support; a core polymer layer extending over an inner region and an outer region of the support, the core polymer layer transversally structured so as to exhibit distinct residual portions, each having a same first height, which corresponds to a thickness of the core polymer layer, the residual portions comprising: first waveguide cores disposed within said inner region, one or more first alignment structures disposed within said outer region; and wherein the support comprises one or more additional polymer cladding portions extending over a polymer cladding layer, the outer region defined on the one or more additional polymer cladding portions, so as for the inner region to be recessed with respect to the outer region; providing a second part comprising: second waveguide cores, each having a same second height; and one or more second alignment structures complementarily shaped with respect to the one or more first alignment structures; wherein the first part is structured such that said inner region is recessed with respect to the outer region, to enable: the second waveguide cores to contact the first waveguide cores; the one or more second alignment structures to respectively receive, at least partly, the one or more first alignment structures; and bringing together the first part and the second part such that the second waveguide cores respectively contact the first waveguide cores and the one or more second alignment structures respectively receive, at least partly, the one or more first alignment structures. 3. The method of claim 2 , wherein providing the first part comprises: depositing a core polymer layer onto both the one or more additional polymer cladding portions and an exposed inner region of the polymer cladding layer, transversally structuring the deposited core polymer layer, and curing the structured core polymer layer to obtain said first waveguide cores and said one or more first alignment structures. 4. The method of claim 3 , wherein transversally structuring the core polymer layer comprises patterning said first waveguide cores and said one or more first alignment structures, during a same patterning process step.

Assignees

Inventors

Classifications

  • having a supporting carrier or a mounting substrate or a mounting plate (G02B6/3648 takes precedence) · CPC title

  • made from organic materials · CPC title

  • G02B6/4228Primary

    Passive alignment, i.e. without a detection of the degree of coupling or the position of the elements (G02B6/4234 takes precedence) · CPC title

  • Coupler · CPC title

  • using vacuum or suction, e.g. Bernoulli chucks · CPC title

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Frequently asked questions

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What does patent US9791642B2 cover?
A chip packaging includes a first part comprising a support; and a core polymer layer transversally structured so as to exhibit distinct residual portions comprising: first waveguide cores each having a first height and disposed within said inner region; and one or more first alignment structures disposed within said outer region. A second part of the packaging comprises: second waveguide cores…
Who is the assignee on this patent?
IBM
What technology area does this patent fall under?
Primary CPC classification G02B6/4228. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Oct 17 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 2 related publications on this page (citations in our corpus or others sharing the same primary CPC).