Semiconductor memory device having a heat insulating mechanism

Patent metadata

Field	Value
Publication number	US-9788463-B2
Application number	US-201514842313-A
Country	US
Kind code	B2
Filing date	Sep 1, 2015
Priority date	Mar 13, 2015
Publication date	Oct 10, 2017
Grant date	Oct 10, 2017

Abstract

A semiconductor memory device includes a semiconductor memory unit, a memory controller, a cover unit having a first portion covering the semiconductor memory unit and a second portion covering the memory controller, a first heat conduction member disposed between the semiconductor memory unit and the first portion of the cover unit, and a second heat conduction member disposed between the memory controller and the second portion of the cover. The cover unit has a gap formed between the first and second portions.

First claim

What is claimed is:

1. A semiconductor memory device, comprising:
a semiconductor memory unit;
a memory controller;
a cover unit having a first portion covering the semiconductor memory unit and a second portion covering the memory controller;
a first heat conduction member disposed between the semiconductor memory unit and the first portion of the cover unit; and
a second heat conduction member disposed between the memory controller and the second portion of the cover unit, wherein
the cover unit has a gap formed between the first and second portions.

2. The semiconductor memory device according to claim 1 , wherein
a portion of the gap extends linearly and is aligned with an edge of the memory controller.

3. The semiconductor memory device according to claim 1 , further comprising:
a first substrate having a surface that faces the first portion of the cover unit and on which the semiconductor memory unit is disposed; and
a second substrate having a surface that faces the second portion of the cover unit and on which the memory controller is disposed, the first substrate being disposed between the second substrate and the first portion of the cover unit, wherein
the second portion of the cover unit extends through an opening formed in the first substrate.

4. The semiconductor memory device according to claim 3 , wherein
the first substrate includes a connector electrically connected to the second substrate, and
the first portion of the cover unit covers a portion of the first substrate corresponding to the connector.

5. The semiconductor memory device according to claim 3 , wherein
the second portion of the cover unit extends through the opening in a thickness direction of the first substrate.

6. The semiconductor memory device according to claim 1 , wherein
at least one of the first and second portions of the cover unit has a plurality of fins extending outward.

7. The semiconductor memory device according to claim 1 , wherein
the first portion of the cover unit does not cover any portion of the memory controller, and
the second portion of the cover unit does not cover any portion of the semiconductor memory unit.

8. The semiconductor memory device according to claim 1 , wherein
the first portion of the cover unit has an opening at a location corresponding to that of the opening formed in the first substrate, and
the second portion of the cover unit protrudes through the opening in the first portion of the cover unit.

9. The semiconductor memory device according to claim 1 , wherein
the first heat conduction member is in direct contact with the first portion of the cover unit and the semiconductor memory unit, and
the second heat conduction member is in direct contact with the second portion of the cover unit and the memory controller.

10. A server, comprising:
a main body including a plurality of slots; and
a plurality of server modules, each being fit in one of the slots, wherein
at least one of the server modules includes a semiconductor memory device including:
a semiconductor memory unit;
a memory controller;
a cover unit having a first portion covering the semiconductor memory unit and a second portion covering the memory controller;
a first heat conduction member disposed between the semiconductor memory unit and the first portion of the cover unit; and
a second heat conduction member disposed between the memory controller and the second portion of the cover unit, and wherein
the cover unit has a gap formed between the first and second portions.

11. The server according to claim 10 , wherein
a portion of the gap extends linearly and is aligned with an edge of the memory controller.

12. The server according to claim 10 , wherein
the second portion of the cover unit has a plurality of fins extending outward.

13. The server according to claim 12 , wherein
said one of the server modules further includes a fan, and
the fins also extend along a direction of an air flow generated by the fan.

14. The server according to claim 10 , wherein
said one of the server modules further includes a container in which the semiconductor memory device is contained and a third heat conduction member disposed between the container and the second portion of the cover unit.

15. The server according to claim 14 , wherein
the third heat conduction member is formed of an elastic material and pressed between the container and the second portion of the cover unit.

16. A semiconductor memory device, comprising:
a semiconductor memory unit;
a memory controller;
a cover unit having a first portion covering the semiconductor memory unit and a second portion covering the memory controller;
a first heat conduction member disposed between the semiconductor memory unit and the first portion of the cover unit;
a second heat conduction member disposed between the memory controller and the second portion of the cover unit; and
a heat insulating member disposed between a gap formed between the first and second portions.

17. The semiconductor memory device according to claim 16 , wherein
a portion of the gap extends linearly and is aligned with an edge of the memory controller.

18. The semiconductor memory device according to claim 16 , wherein
a first substrate having a surface that faces the first portion of the cover unit and on which the semiconductor memory unit is disposed; and
a second substrate having a surface that faces the second portion of the cover unit and on which the memory controller is disposed, the first substrate being disposed between the second substrate and the first portion of the cover unit, wherein
the second portion of the cover unit extends through an opening formed in the first substrate.

19. The semiconductor memory device according to claim 16 , wherein
the first portion of the cover unit does not cover any portion of the memory controller, and
the second portion of the cover unit does not cover any portion of the semiconductor memory unit.

20. The semiconductor memory device according to claim 16 , wherein
the first heat conduction member is in direct contact with the first portion of the cover unit and the semiconductor memory unit, and
the second heat conduction member is in direct contact with the second portion of the cover unit and the memory controller.

Assignees

• Toshiba Memory Corp

Inventors

• Ozawa Yasuyuki
• Kimura Fuminori
• Niijima Masaaki
• Iijima Masahiro
• Matsuda Yoshiharu
• Sawanaka Kenichi
• Yoshida Kazuhiro

Classifications

• G11C5/04

  Supports for storage elements {, e.g. memory modules}; Mounting or fixing of storage elements on such supports · CPC title

• H05K7/20754 Primary

  Air circulating in closed loop within cabinets · CPC title

• G11B33/1406 Primary

  Reducing the influence of the temperature · CPC title