Apparatus and method for unified mitigation of correlative additive and multiplicative noise

Patent metadata

Field	Value
Publication number	US-9787408-B2
Application number	US-201514876459-A
Country	US
Kind code	B2
Filing date	Oct 6, 2015
Priority date	Oct 6, 2015
Publication date	Oct 10, 2017
Grant date	Oct 10, 2017

Abstract

A digital signal processing method and apparatus is described. The digital processing apparatus comprises a coarse carrier recovery module for performing a coarse carrier compensation of a received modulated signal; and a trellis-based equalization module selectable between a first mode for performing a trellis-based equalization to compensate a residual inter-symbol interference of the received modulated signal and a second mode for performing a trellis-based equalization to compensate a residual phase noise of the received modulated signal.

First claim

What is claimed is:

1. A method for digitally processing a modulated signal, the method comprising:
determining an operation state of a trellis-based equalization engine;
performing a coarse carrier compensation of the modulated signal to obtain a coarse carrier compensated signal;
when the determined operation state is a first mode of the trellis-based equalization engine, performing a trellis-based equalization to compensate a residual inter symbol interference of the coarse carrier compensated signal using the trellis-based equalization engine; and
when the determined operation state is a second mode of the trellis-based equalization engine, performing a trellis-based equalization to compensate a residual phase noise of the coarse carrier compensated signal using the trellis-based equalization engine,
wherein the trellis-based equalization engine uses a trellis structure, in the first mode each state in the trellis structure represents a possible weighted sum of a group of received symbols, and in the second mode each state in the trellis structure represents a possible residual phase noise of a received symbol.

2. The method as defined in claim 1 , further comprising:
dividing an output frame of the coarse carrier compensated signal into P parallel blocks of symbols; and
parallel processing each of the P parallel blocks of symbols in one of a plurality of parallel trellis-based equalization engines.

3. The method as defined in claim 2 , wherein a l th block of the P parallel blocks comprises a plurality of last symbols of a (l−1) th block for initialization of a l th trellis-based equalization engine.

4. The method as defined in claim 1 , wherein the trellis-based equalization engine uses a same Euclidean distance metric for both the first mode and the second mode.

5. The method as defined in claim 1 , wherein the trellis structure is comprised of a same number of states and a same trace back length for both the first mode and the second mode.

6. The method as defined in claim 1 , wherein the operation state is independent from a modulation format of the modulated signal.

7. The method as defined in claim 5 , wherein in the first mode each state in the trellis structure represents a possible weighted sum of a current symbol and at least one previous symbol.

8. The method as defined in claim 7 , wherein in the first mode performing the trellis-based equalization further comprises:
post-filtering the coarse carrier compensated signal to obtain a post-filtered signal; and
calculating a Euclidean distance metric between the post-filtered signal and the weighted sum of the current symbol and the at least one previous symbol.

9. The method as defined in claim 1 , further comprising delaying the coarse carrier compensated signal in the first mode to provide a same throughput as in the second mode.

10. The method as defined in claim 1 , wherein in the second mode performing the trellis-based equalization comprises, for each state in the trellis structure,
phase-rotating the coarse carrier compensated signal according to the residual phase noise corresponding to the state;
mapping the rotated version of the coarse carrier compensated signal to a constellation point in a modulation constellation of the modulated signal;
calculating a Euclidean distance metric between the rotated version of the coarse carrier compensated signal and the constellation point;
calculating a probability of a phase noise jump corresponding to a branch leading to the state; and
obtaining a branch metric of the branch based on a sum computation of the Euclidean distance metric and the probability of the phase noise jump.

11. The method as defined in claim 1 , wherein the possible residual phase noises corresponding to the states of the trellis structure have uniformly distributed values.

12. The method as defined in claim 1 , wherein the possible residual phase noises corresponding to the states of the trellis structure have uniformly distributed arctan values.

13. The method as defined in claim 1 , wherein the operation state of the trellis-based equalization engine includes a bypass state of the trellis-based equalization engine.

14. The method as defined in claim 1 , wherein the trellis-based equalization engine is configured to propagate the trellis structure from a trellis stage to a next trellis stage based on a reduced set of states, wherein the reduced set of states is selected from a state having a minimum metric in the trellis stage and the reduced set of states is predetermined based on whether the determined operation state is the first mode or the second mode of the trellis-based equalization engine.

15. A digital signal processing apparatus, the digital processing apparatus comprising:
a coarse carrier recovery module for performing a coarse carrier compensation of a received modulated signal; and
a trellis-based equalization module selectable between a first mode for performing a trellis-based equalization to compensate a residual inter-symbol interference of the received modulated signal and a second mode for performing a trellis-based equalization to compensate a residual phase noise of the received modulated signal, wherein the trellis-based equalization uses a trellis structure, in the first mode each state in the trellis structure represents a possible weighted sum of a group of received symbols, and in the second mode each state in the trellis structure represents a possible residual phase noise of a received symbol.

16. The digital signal processing apparatus as defined in claim 15 , wherein an output frame from the coarse carrier recovery module is divided into P parallel blocks, and the digital processing apparatus comprises P parallel trellis-based equalization modules each configured to process one of the P parallel blocks.

17. The digital signal processing apparatus as defined in claim 16 , wherein a l th block of the P parallel blocks comprises a plurality of last symbols of a (l−1) th block for initialization of a l th trellis-based equalization module.

18. The digital signal processing apparatus as defined in claim 15 , wherein the trellis-based equalization module uses a same Euclidean distance metric for both the first mode and the second mode.

19. The digital signal processing apparatus as defined in claim 15 , wherein the trellis structure is comprised of a same number of states and a same trace-back length for both the first mode and the second mode.

20. The method as defined in claim 15 , wherein the mode is independent from a modulation format based on which the modulated signal is modulated.

21. The digital processing apparatus as defined in claim 19 , wherein in the first mode each state in the trellis structure represents a possible weighted sum of a current symbol and at least one previous symbol.

22. The digital signal processing apparatus as defined in claim 21 , wherein in the first mode the trellis-based equalization module is configured to:
post-filter an output from the coarse carrier recovery module to obtain a post-filtered signal; and
calculate a Euclidean distance metric between the post-filtered signal and the possible weighted sum of the current symbol and the at least one previous symbol.

23. The digital signal processing apparatus as defined in claim 15 , wherein in the first mode, an output from the coarse carrier recovery module is delayed to provide a same throughput as in the second mode.

Assignees

• Zamani Mahdi
• Mitra Jeebak
• Zhang Zhuhong
• Li Chuandong
• Najafi Hossein
• Yao Demin
• Huawei Tech Co Ltd

Inventors

• Zamani Mahdi
• Mitra Jeebak
• Zhang Zhuhong
• Li Chuandong
• Najafi Hossein
• Yao Demin

Classifications

• H04B10/6165 Primary

  Estimation of the phase of the received optical signal, phase error estimation or phase error correction · CPC title

• H04L1/0054

  Maximum-likelihood or sequential decoding, e.g. Viterbi, Fano, ZJ algorithms · CPC title

• H04L25/03178

  Arrangements involving sequence estimation techniques · CPC title

• H04L25/03203

  Trellis search techniques · CPC title

• H04B10/616

  Details of the electronic signal processing in coherent optical receivers · CPC title