Linearizing and reducing peaking simultaneously in single-to-differential wideband radio frequency variable gain trans-impedance amplifier (TIA) for optical communication

Patent metadata

Field	Value
Publication number	US-9787272-B2
Application number	US-201514927885-A
Country	US
Kind code	B2
Filing date	Oct 30, 2015
Priority date	Oct 30, 2015
Publication date	Oct 10, 2017
Grant date	Oct 10, 2017

Abstract

An amplifier, a circuit, and an optical communication system are provided. The disclosed amplifier may include a first transistor receiving a first portion of an input signal received at the amplifier, a second transistor receiving a second portion of the input signal, an automatic gain control signal that is dynamically adjustable in response to variations in an output of the amplifier, and a varactor that has its capacitance adjusted by changes in the automatic gain control signal and, as a result, adjusts a position of a pole in a transfer function of the amplifier.

First claim

What is claimed is:

1. An amplifier, comprising:
a first transistor receiving a first portion of an input signal received at the amplifier;
a second transistor receiving a second portion of the input signal;
an automatic gain control signal that is dynamically adjustable in response to variations in an output of the amplifier; and
a varactor that has its capacitance adjusted by changes in the automatic gain control signal and, as a result, adjusts a position of a pole in a transfer function of the amplifier.

2. The amplifier of claim 1 , further comprising:
a third transistor receiving a bias voltage as an input, an emitter of the third transistor being directly connected to a collector of the first transistor; and
a fourth transistor receiving the bias voltage as an input, an emitter of the fourth transistor being directly connected to a collector of the second transistor, wherein the varactor is connected to both a collector of the third transistor and a collector of the fourth transistor.

3. The amplifier of claim 2 , wherein the automatic gain control signal comprises a control voltage from an automatic gain control loop.

4. The amplifier of claim 3 , wherein an increase in the control voltage from the automatic gain control loop causes a capacitance of the varactor to decrease and wherein a decrease in the control voltage from the automatic gain control loop causes the capacitance of the varactor to increase.

5. The amplifier of claim 2 , wherein the varactor comprises a first terminal directly connected to the collector of the third transistor and a second terminal directly connected to the collector of the fourth transistor.

6. The amplifier of claim 5 , wherein the collector of the third transistor and the collector of the fourth transistor are connected to the control voltage from the automatic gain control loop via a first resistor and second resistor, respectively.

7. The amplifier of claim 5 , further comprising:
a fifth transistor having its base directly connected to the collector of the third transistor and the first terminal of the varactor, wherein an emitter of the fifth transistor outputs an amplified version of the second portion of the input signal; and
a sixth transistor having its base directly connected to the collector of the fourth transistor and the second terminal of the varactor, wherein an emitter of the sixth transistor outputs an amplified version of the first portion of the input signal.

8. The amplifier of claim 1 , further comprising:
a Metal-Oxide-Semiconductor Field-Effect Transistor (MOSFET) connected between an emitter of the first transistor and an emitter of the second transistor and having a gate that receives the automatic gain control signal.

9. A circuit, comprising:
a photodiode configured to receive an optical signal and convert the optical signal into an electrical signal; and
a variable gain amplifier configured to receive the electrical signal or a variant thereof and amplify the received electrical signal or the variant thereof, wherein the variable gain amplifier comprises:
a first transistor;
a second transistor;
an automatic gain control loop that generates a control voltage responsive to variations in an output of the variable gain amplifier; and
a varactor that has its capacitance adjusted by changes in the automatic gain control signal and, as a result, adjusts a position of a pole in a transfer function of the variable gain amplifier.

10. The circuit of claim 9 , wherein the variable gain amplifier further comprises:
a third transistor receiving a bias voltage as an input, wherein an emitter of the third transistor is directly connected to a collector of the first transistor; and
a fourth transistor receiving the bias voltage as an input, wherein an emitter of the fourth transistor is directly connected to a collector of the second transistor, wherein the varactor is connected to both a collector of the third transistor and a collector of the fourth transistor.

11. The circuit of claim 10 , wherein an increase in the control voltage from the automatic gain control loop causes a capacitance of the varactor to decrease and wherein a decrease in the control voltage from the automatic gain control loop causes the capacitance of the varactor to increase.

12. The circuit of claim 10 , wherein the varactor comprises a first terminal directly connected to the collector of the third transistor and a second terminal directly connected to the collector of the fourth transistor.

13. The circuit of claim 12 , wherein the collector of the third transistor and the collector of the fourth transistor are connected to the control voltage from the automatic gain control loop via a first resistor and second resistor, respectively.

14. The circuit of claim 13 , wherein the variable gain amplifier further comprises:
a fifth transistor having its base directly connected to the collector of the third transistor and the first terminal of the varactor, wherein an emitter of the fifth transistor outputs an amplified version of the second portion of the input signal; and
a sixth transistor having its base directly connected to the collector of the fourth transistor and the second terminal of the varactor, wherein an emitter of the sixth transistor outputs an amplified version of the first portion of the input signal.

15. The circuit of claim 9 , further comprising a second variable gain amplifier that receives the output from the variable gain amplifier and provides an amplified version thereof, wherein the second variable gain amplifier comprises a second varactor that has its capacitance adjusted by changes in the automatic gain control signal and, as a result, adjusts a position of a pole in a transfer function of the second variable gain amplifier.

16. An optical communication system, comprising:
an analog front end comprising one or more variable gain amplifiers, the one or more variable gain amplifiers comprising:
a first transistor;
a second transistor;
an automatic gain control loop that generates a control voltage responsive to variations in an output of the analog front end; and
a varactor that has its capacitance adjusted by changes in the automatic gain control signal and, as a result, adjusts a position of a pole in a transfer function of the one or more variable gain amplifiers.

17. The optical communication system of claim 16 , wherein the one or more variable gain amplifiers further comprises:
a third transistor receiving a bias voltage as an input, wherein an emitter of the third transistor is directly connected to a collector of the first transistor; and
a fourth transistor receiving the bias voltage as an input, wherein an emitter of the fourth transistor is directly connected to a collector of the second transistor, wherein the varactor is connected to both a collector of the third transistor and a collector of the fourth transistor.

18. The optical communication system of claim 17 , wherein an increase in the control voltage from the automatic gain control loop causes a capacitance of the varactor to decrease and wherein a decrease in the control voltage from the automatic gain control loop causes the capacitance of the varactor to increase.

19. The optical communication system of claim 17 , wherein the varactor comprises a first terminal directly connected to the collector of the third transistor and a second terminal directly connected to the collector of the fourth transistor.

20. The optical communication system of claim 17 , whe

Assignees

• Avago Technologies General Ip

Inventors

• Nallani Chakravartula
• Shringarpure Rahul
• Asmanis Georgios
• Chaahoub Faouzi
• Venkataramu Kishan

Classifications

• H03F3/08

  controlled by light · CPC title

• H04B10/40

  Transceivers · CPC title

• H01L31/02016

  Electricity · mapped topic

• H03G5/28

  having semiconductor devices · CPC title

• H03F2200/339

  Pulse amplitude modulation being used in an amplifying circuit · CPC title