Capacitive load driving circuit

US9787218B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9787218-B2
Application numberUS-201214355401-A
CountryUS
Kind codeB2
Filing dateAug 23, 2012
Priority dateNov 2, 2011
Publication dateOct 10, 2017
Grant dateOct 10, 2017

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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Abstract

Official abstract text for this publication.

A driving circuit is a circuit selectively outputting one of a staircase wave and a square wave from an output terminal, to drive a capacitive load, and includes a first power source supplying a constant voltage VH, a first FET connected between the output terminal and the first power source, a first transformer in which an output side coil is connected to a gate of the first FET, a first input terminal connected to an input side coil of the first transformer via a capacitive element, a second power source supplying a constant voltage VL, a second FET connected between the output terminal and the second power source, a second transformer in which an output side coil is connected to a gate of the second FET, and a second input terminal connected to an input side coil of the second transformer via a capacitive element.

First claim

Opening claim text (preview).

The invention claimed is: 1. A capacitive load driving circuit comprising: an output terminal: a first constant potential line supplying a first constant voltage; a first transistor whose one current terminal is directly connected to the output terminal, and whose other current terminal is directly connected to the first constant potential line; a first transformer which has an input side coil and an output side coil, and the output side coil is connected to a control termin…

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What does patent US9787218B2 cover?
A driving circuit is a circuit selectively outputting one of a staircase wave and a square wave from an output terminal, to drive a capacitive load, and includes a first power source supplying a constant voltage VH, a first FET connected between the output terminal and the first power source, a first transformer in which an output side coil is connected to a gate of the first FET, a first input…
Who is the assignee on this patent?
YAMAGISHI Shogo, Fujimoto Masatoshi, Takahashi Akira, and 1 more
What technology area does this patent fall under?
Primary CPC classification H02M7/537. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Oct 10 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).