Diode and method of making the same
US-2024355937-A1 · Oct 24, 2024 · US
US9786796B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9786796-B2 |
| Application number | US-201514688640-A |
| Country | US |
| Kind code | B2 |
| Filing date | Apr 16, 2015 |
| Priority date | Jun 4, 2009 |
| Publication date | Oct 10, 2017 |
| Grant date | Oct 10, 2017 |
A practical reading order for non-experts. Skip the full description unless you need deep technical detail.
What the patent document calls the invention.
A short plain-language summary of the technical disclosure.
Who owns or filed the patent and who is credited as inventor.
Filing, priority, publication, and grant dates set the timeline.
The legal scope of protection — read this for what is actually claimed.
Technology tags used to group this patent with similar filings.
Prior art links and similar publications in this corpus.
Official abstract text for this publication.
A semiconductor device having first through third layers. The first layer has a conductivity type that is different from a conductivity type of the second layer. A peak value of an impurity concentration of a portion of the third layer is greater than a peak value of an impurity concentration of the second layer. The semiconductor device allows a decrease in the forward voltage drop and also allows an improvement of the safe operating area tolerance. Thus, it is possible to decrease the forward voltage drop, improve the maximum reverse voltage, and suppress oscillations at the time of recovery.
Opening claim text (preview).
What is claimed is: 1. A semiconductor device comprising: a first electrode; a first layer located on said first electrode and having a first conductivity type; a second layer located on said first layer and having a second conductivity type different from said first conductivity type; a third layer located on said second layer and having a first portion, said first portion having said second conductivity type and having a peak value of an impurity concentration higher than the peak value of the impurity concentration in said second layer; a second electrode located on said third layer; a trench structure located in said first portion and said second layer a dielectric film; a third electrode disposed within said trench structure; and a diffusion layer located between said third layer and said second electrode and having said first conductivity type having a peak value of an impurity concentration higher than the peak value of the impurity concentration in said first layer, wherein said trench structure is completely surrounded by said second conductivity type in an area extending from said second layer to said third layer, said dielectric film is disposed between said third electrode and said second electrode, a first insulation film is disposed between said dielectric film and said third electrode, a second insulation layer is disposed between said dielectric film and said second electrode, and the second insulation layer is disposed between said third electrode and said second electrode. 2. The semiconductor device according to claim 1 , wherein said trench structure extends through said first portion. 3. The semiconductor device according to claim 1 , further comprising, between said second layer and said third layer, a fourth layer having said second conductivity type, having a peak value of an impurity concentration higher than the peak value of the impurity concentration in said second layer, and having a peak value of an impurity concentration lower than the peak value of the impurity concentration in said first portion. 4. The semiconductor device according to claim 3 , wherein said trench structure extends through said first portion and said fourth layer. 5. The semiconductor device according to claim 1 , further comprising a barrier metal layer disposed between said dielectric film and said second electrode. 6. The semiconductor device according to claim 5 , wherein said second insulation layer is disposed between said dielectric film and said barrier metal layer. 7. The semiconductor device according to claim 1 , further comprising a barrier metal layer disposed between said dielectric film and said second electrode, wherein said barrier metal layer is located between said diffusion layer and said second electrode. 8. The semiconductor device according to claim 7 , wherein said diffusion layer is formed such that the barrier layer does not come into contact with said third layer.
Diodes (variable-capacitance diodes H10D1/64; gated diodes H10D12/00) · CPC title
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Related publications grouped by family.
Answers are generated from the same data shown on this page.