Organic light-emitting diode display

Patent metadata

Field	Value
Publication number	US-9786725-B2
Application number	US-201514858431-A
Country	US
Kind code	B2
Filing date	Sep 18, 2015
Priority date	Mar 18, 2015
Publication date	Oct 10, 2017
Grant date	Oct 10, 2017

Abstract

An organic light-emitting diode (OLED) display is disclosed. In one aspect, the display includes a scan line formed over a substrate and configured to provide a scan signal. A data line crossing the scan line is configured to respectively provide a data voltage, and a driving voltage line crossing the scan line is configured to respectively provide a driving voltage. The display includes a switching transistor electrically connected to the scan line and the data line and including a drain electrode configured to output the data voltage. A driving transistor includes a driving gate electrode electrically connected to the drain electrode of the switching transistor. A contact hole is formed between the driving gate electrode and the data line, and the driving voltage line passes through the contact hole to be connected to a conductive layer.

First claim

What is claimed is:

1. An organic light-emitting diode (OLED) display, comprising:
a substrate;
a scan line formed over the substrate and configured to provide a scan signal;
a data line crossing the scan line and configured to provide a data voltage;
a driving voltage line crossing the scan line and configured to provide a driving voltage;
a switching transistor electrically connected to the scan line and the data line and including a drain electrode configured to output the data voltage; and
a driving transistor including a driving gate electrode electrically connected to the drain electrode of the switching transistor,
wherein a contact hole is formed between the driving gate electrode and the data line, wherein the driving voltage line passes through the contact hole to be connected to a conductive layer, and
wherein the conductive layer comprises a shield gate electrode or a shield channel located on a second side opposite a first side where the driving gate electrode is located with respect to the drive voltage line and extended along a direction in which the data line is extended.

2. The OLED display of claim 1 , wherein the conductive layer comprises the shield gate electrode formed on the same layer as the driving gate electrode of the driving transistor.

3. The OLED display of claim 2 , wherein the driving voltage line is farther from the substrate than the shield gate electrode.

4. The OLED display of claim 3 , wherein a first portion of the driving voltage line formed inside the contact hole is configured to shield a parasitic capacitance formed between the data line and the driving gate electrode.

5. The OLED display of claim 4 , wherein the width of the contact hole increases with distance from the shield gate electrode.

6. The OLED display of claim 5 , wherein the driving voltage line includes a second portion connected to the first portion, and wherein the second portion is formed over the contact hole and has a trapezoid shape.

7. The OLED display of claim 3 , further comprising:
a gate insulating layer formed over the substrate; and
an interlayer insulating layer formed over the gate insulating layer, wherein the contact hole is formed in the interlayer insulating layer, and wherein the shield gate electrode is covered by the interlayer insulating layer.

8. The OLED display of claim 1 , wherein the conductive layer comprises the shield channel formed on the same layer as a driving channel of the driving transistor.

9. The OLED display of claim 8 , further comprising:
a gate insulating layer formed over the substrate; and
an interlayer insulating layer formed over the gate insulating layer, wherein the contact hole is formed in the interlayer insulating layer, and wherein the shield channel is formed in and covered by the gate insulating layer.

10. An organic light-emitting diode (OLED) display, comprising:
a substrate;
a data line formed over the substrate and configured to provide a data voltage;
a driving voltage line formed over the substrate and configured to provide a driving voltage;
a driving transistor including a driving gate electrode electrically connected to the driving voltage line; and
a conductive layer interposed between the substrate and the data line,
wherein the driving voltage line is electrically connected to the conductive layer via a contact hole formed between the driving gate electrode and the data line, wherein the driving voltage line includes a portion extended in a first direction where the driving transistor is formed, and wherein the conductive layer is extended in a second direction across from the first direction.

11. The OLED display of claim 10 , wherein a portion of the driving voltage line is formed in the contact hole and configured to shield a parasitic capacitance formed between the data line and the driving gate electrode.

12. The OLED display of claim 10 , wherein the conductive layer includes a shield gate electrode formed on the same layer as the driving gate electrode, and wherein the driving voltage line is directly connected to the shield gate electrode via the contact hole.

13. The OLED display of claim 12 , wherein the shield gate electrode and the driving gate electrode are formed on the same layer.

14. The OLED display of claim 10 , wherein the conductive layer includes a shield channel formed on the same layer as a driving channel of the driving transistor, and wherein the driving voltage line is electrically connected to the shield channel via the contact hole.

15. The OLED display of claim 14 , wherein the shield channel and the driving gate electrode are formed on different layers.

16. The OLED display of claim 15 , further comprising a gate insulating layer formed over the shield channel, wherein the driving gate electrode is formed over the gate insulating layer.

17. The OLED display of claim 16 , wherein the contact hole is further formed in the gate insulating layer.

18. An organic light-emitting diode (OLED) display, comprising:
a substrate;
a data line formed over the substrate and configured to provide a data voltage;
a driving voltage line formed over the substrate and configured to provide a driving voltage, wherein the driving voltage line includes a first portion and a second portion;
a driving transistor including a driving channel and a driving gate electrode electrically connected to the driving voltage line;
a shield gate electrode formed on the same layer as the driving gate electrode; and
a shield channel formed on the same layer as the driving channel,
wherein the first portion of the driving voltage line is connected to the shield gate electrode via a first contact hole, and wherein the second portion of the driving voltage line is connected to the shield channel via a second contact hole.

19. The OLED display of claim 18 , further comprising:
a scan line formed over the substrate and configured to provide a scan signal; and
a switching transistor electrically connected to the scan line and the data line and including a drain electrode configured to output the data voltage,
wherein the driving gate electrode of the driving transistor is electrically connected to the drain electrode of the switching transistor.

20. The OLED display of claim 18 , wherein the widths of the first and second contact holes become increases with distance from the shield gate electrode.

Assignees

• Samsung Display Co Ltd

Inventors

• Pyon Chang Soo
• Sung Seung Woo

Classifications

• G09G2310/0262

  The addressing of the pixel, in a display other than an active matrix LCD, involving the control of two or more scan electrodes or two or more data electrodes, e.g. pixel voltage dependent on signals of two data electrodes · CPC title

• G09G2300/0426

  Layout of electrodes and connections · CPC title

• G09G2300/0861

  with additional control of the display period without amending the charge stored in a pixel memory, e.g. by means of additional select electrodes · CPC title

• G09G2300/0819

  used for counteracting undesired variations, e.g. feedback or autozeroing · CPC title

• G09G3/3225 Primary

  using an active matrix · CPC title