Tensile stress resistant multilayer ceramic capacitor

US9786436B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9786436-B2
Application numberUS-201615236596-A
CountryUS
Kind codeB2
Filing dateAug 15, 2016
Priority dateSep 30, 2014
Publication dateOct 10, 2017
Grant dateOct 10, 2017

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  1. Title

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  2. Abstract

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A multilayer ceramic capacitor is configured such that “a” is a distance in a height direction between an effective portion and a first principal surface; “b” is a distance in a length direction between a first end surface and the effective portion in the length direction; “c” is a thickness of the thickest portion of a first base layer provided over the first principal surface; “d” is a distance in the length direction between the thickest portion of the first base layer provided over the first end surface and a portion of the first base layer located over the first principal surface and closest to a second end surface; and “e” is a maximum thickness of a portion of the first base layer provided over the first end surface; and f: the height of the ceramic body, and 2≦(c·d+e·f/2)/(a·b)≦6 is satisfied.

First claim

Opening claim text (preview).

What is claimed is: 1. A multilayer ceramic capacitor comprising: a ceramic body including first and second principal surfaces extending in a length direction and a width direction, first and second side surfaces extending in the length direction and a height direction, and first and second end surfaces extending in the width direction and the height direction; a first internal electrode extending in the length direction and the width direction, provided in the ceramic body, and exposed at the first end surface; a second internal electrode extending in the length direction and the width direction, provided in the ceramic body, exposed at the second end surface, and the second internal electrode facing the first internal electrode in the height direction with a ceramic portion interposed therebetween; a first external electrode connected to the first internal electrode and provided over the first end surface and over the first principal surface; a maximum thickness and an average thickness of a portion of the first external electrode located on the first principal surface are denoted respectively by D max and D ave ; and D ave ×250%≧D max ≧D ave ×120% is satisfied. 2. The multilayer ceramic capacitor according to claim 1 , further comprising: a second external electrode connected to the second internal electrode and provided over the second end surface and over a portion of each of the first and second principal surfaces; wherein the first external electrode includes a first base layer provided over a portion of the ceramic body and including a metal and glass, and a first plated layer provided over the first base layer; the second external electrode includes a second base layer provided over a portion of the ceramic body and including a metal and glass, and a second plated layer provided over the second base layer; the first and second plated layers each include a Cu plated layer. 3. The multilayer ceramic capacitor according to claim 1 , wherein the multilayer ceramic capacitor is about 0.9 mm to about 1.1 mm in length dimension, about 0.4 mm to about 0.6 mm in width dimension, and about 0.085 mm to about 0.15 mm in height dimension. 4. The multilayer ceramic capacitor according to claim 1 , wherein a height of an effective portion that is a portion of the ceramic body where the first and second internal electrodes overlap each other in the height direction is referred to as A in the height direction; and a height of a first outer layer portion that is a portion of the ceramic body located between the first principal surface and the effective portion is referred to as B in the height direction; and a height of a second outer layer portion that is a portion of the ceramic body located between the second principal surface and the effective portion is referred to as C in the height direction; each of ratios A/B and A/C is within a range of about 0.5 to about 16. 5. The multilayer ceramic capacitor according to claim 1 , wherein the multilayer ceramic capacitor is about 0.9 mm or more and about 1.1 mm or less in length dimension, about 0.4 mm or more and about 0.6 mm or less in width dimension, and about 0.085 mm or more and about 0.11 mm or less in height dimension, a maximum distance from the first principal surface to an internal electrode closest to the first principal surface among the first internal electrode and the second internal electrode in the height direction is referred to as T MAX ; and a minimum distance from the first principal surface to the internal electrode closest to the first principal surface in the height direction is referred to as T MIN ; and a ratio (T MAX −T MIN )/T is about 1.0% to about 5.0%. 6. The multilayer ceramic capacitor according to claim 1 , wherein the multilayer ceramic capacitor is about 0.9 mm or more and about 1.1 mm or less in length dimension, about 0.4 mm or more and about 0.6 mm or less in width dimension, and about 0.12 mm or more and about 0.15 mm or less in height dimension; a maximum distance from the first principal surface to an internal electrode closest to the first principal surface among the first internal electrode and the second internal electrode in the height direction is referred to as T MAX ; and a minimum distance from the first principal surface to the internal electrode closest to the first principal surface in the height direction is referred to as T MIN ; and a ratio (T MAX −T MIN )/T is about 1.3% to about 5.3%. 7. The multilayer ceramic capacitor according to claim 1 , wherein the multilayer ceramic capacitor is about 0.9 mm or more and about 1.1 mm or less in length dimension, about 0.4 mm or more and about 0.6 mm or less in width dimension, and about 0.18 mm or more and about 0.20 mm or less in height dimension; a maximum distance from the first principal surface to an internal electrode closest to the first principal surface among the first internal electrode and the second internal electrode in the height direction is referred to as T MAX ; and a minimum distance from the first principal surface to the internal electrode closest to the first principal surface in the height direction is referred to as T MIN ; and a ratio (T MAX −T MIN )/T is about 1.5% to about 5.0%. 8. The multilayer ceramic capacitor according to claim 1 , wherein the multilayer ceramic capacitor is about 0.9 mm or more and about 1.1 mm or less in length dimension, about 0.4 mm or more and about 0.6 mm or less in width dimension, and about 0.21 mm or more and about 0.23 mm or less in height dimension; a maximum distance from the first principal surface to an internal electrode closest to the first principal surface among the first internal electrode and the second internal electrode in the height direction is referred to as T MAX ; a minimum distance from the first principal surface to the internal electrode closest to the first principal surface in the height direction is referred to as T Min ; and a ratio (T MAX −T MIN )/T is about 1.8% to about 5.9%. 9. The multilayer ceramic capacitor according to claim 1 , wherein the multilayer ceramic capacitor is about 0.9 mm or more and about 1.1 mm or less in length dimension, about 0.4 mm or more and about 0.6 mm or less in width dimension, and about 0.024 mm or more and about 0.30 mm or less in height dimension; a maximum distance from the first principal surface to an internal electrode closest to the first principal surface among the first internal electrode and the second internal electrode in the height direction is referred to as T MAX ; a minimum distance from the first principal surface to the internal electrode closest to the first principal surface in the height direction is referred to as T MIN ; and a ratio (T MAX −T MIN )/T is about 1.2% to about 6.0%. 10. The multilayer ceramic capacitor according to claim 1 , wherein a distance in the length direction from a position of a surface at a maximum dimension in the height direction of the first external electrode on the first principal surface to a position of a surface at a maximum dimension of the first external electrode in the length direction on the first end surface is referred to as E; and a distance in the length direction from the position of the surface at the maximum dimension on the first end surface to an edge end of the first external electrode on the first principal surface is referred to as e; a ratio E/e is about 0.243 or more and about 0.757 or less. 11. The multilayer ceramic capacitor according to claim 1 , wherein a height dimension of the ceramic body is DT, a length dimension of the ceramic body is DL, and a width dimension of the ceramic body is DW, and a relationship ( 1/7)DW≦DT≦

Assignees

Inventors

Classifications

  • associated with components mounted in printed circuit boards [PCB], e.g. insert-mounted components [IMC] · CPC title

  • associated with components encapsulated in the insulating substrate of the PCBs; associated with components incorporated in internal layers of multilayer circuit boards · CPC title

  • Via connections; Lands around holes or via connections (H05K1/112 takes precedence) · CPC title

  • Multilayer circuits · CPC title

  • based on alkaline earth titanates · CPC title

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What does patent US9786436B2 cover?
A multilayer ceramic capacitor is configured such that “a” is a distance in a height direction between an effective portion and a first principal surface; “b” is a distance in a length direction between a first end surface and the effective portion in the length direction; “c” is a thickness of the thickest portion of a first base layer provided over the first principal surface; “d” is a distan…
Who is the assignee on this patent?
Murata Manufacturing Co
What technology area does this patent fall under?
Primary CPC classification H01G4/2325. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Oct 10 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).