Display device

US9786384B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9786384-B2
Application numberUS-201414308670-A
CountryUS
Kind codeB2
Filing dateJun 18, 2014
Priority dateDec 17, 2013
Publication dateOct 10, 2017
Grant dateOct 10, 2017

How to read this patent

A practical reading order for non-experts. Skip the full description unless you need deep technical detail.

  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

    Who owns or filed the patent and who is credited as inventor.

  4. Key dates

    Filing, priority, publication, and grant dates set the timeline.

  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

    Prior art links and similar publications in this corpus.

Abstract

Official abstract text for this publication.

Disclosed is a display device including a light emission driver configured to sequentially generate a plurality of light emission signals having a disable level during a first period; and a scan driver configured to generate a plurality of shift outputs each having two enable pulses, and each outputting two scan signals, in response to two light emission signals among the plurality of light emission signals, by dividing the two enable pulses of a first shift output among the plurality of shift outputs, which correspond to the two light emission signals among the plurality of light emission signals, from each other.

First claim

Opening claim text (preview).

What is claimed is: 1. A display device, comprising: a light emission driver configured to sequentially generate a plurality of light emission signals having a disable level during a first period; and a scan driver configured to generate a plurality of shift outputs, each of the plurality of shift outputs comprising two enable pulses on a same signal line during a same frame, and each of the plurality of shift outputs corresponding to two scan signals of a plurality of scan signals, wherein the scan driver is further configured to output a first scan signal and a second scan signal in response to first and second light emission signals among the plurality of light emission signals, by dividing the two enable pulses of a first shift output among the plurality of shift outputs, which correspond to the first and second light emission signals among the plurality of light emission signals, from each other. 2. A display device, comprising: a light emission driver configured to sequentially generate a plurality of light emission signals having a disable level during a first period; and a scan driver configured to generate a plurality of shift outputs, each of the plurality of shift outputs comprising two enable pulses, and each of the plurality of shift outputs corresponding to two scan signals of a plurality of scan signals, wherein the scan driver is further configured to output a first scan signal and a second scan signal in response to first and second light emission signals among the plurality of light emission signals, by dividing the two enable pulses of a first shift output among the plurality of shift outputs, which correspond to the first and second light emission signals among the plurality of light emission signals, from each other, wherein the scan driver comprises: a shift register unit comprising a plurality of shift registers configured to generate the plurality of shift outputs, respectively; and a demultiplexer comprising a plurality of switches, which are coupled to the plurality of shift outputs, and wherein a third switch among the plurality of switches, which corresponds to the first shift output, is controlled by the second light emission signal, and a fourth switch among the plurality of switches, which corresponds to the first shift output, is controlled by the first light emission signal. 3. The display device of claim 2 , wherein a first shift register, among the plurality of shift registers, outputs the first shift output in response to a second shift output of a second shift register, wherein the first shift output comprises two enable pulses synchronized with a first scan clock signal comprising two periodic enable pulses, wherein the two enable pulses of the second shift output are synchronized with a second scan clock signal comprising two periodic enable pulses, and wherein the second shift register is located two stages before the first shift register. 4. The display device of claim 3 , wherein the first scan clock signal and the second scan clock signal have a half-period phase difference therebetween. 5. The display device of claim 4 , wherein the first shift register comprises: a first transistor comprising a first terminal coupled to the second shift output and a gate coupled to the second scan clock signal; a second transistor comprising a gate coupled to a second terminal of the first transistor, a first terminal coupled to the first scan clock signal, and a second terminal coupled to an output terminal of the first shift register; and a capacitor coupled between the gate and the second terminal of the second transistor. 6. The display device of claim 5 , wherein the first shift register further comprises: a third transistor comprising a first terminal coupled to a first voltage and a second terminal coupled to the output terminal of the first shift register; and a fourth transistor comprising a first terminal coupled to a gate of the third transistor, a gate coupled to the second shift output, and a second terminal coupled to the first voltage. 7. The display device of claim 6 , wherein the first shift register further comprises: a fifth transistor comprising a first terminal coupled to the gate of the third transistor, a gate coupled to a first initialization signal, and a second terminal coupled to a second voltage; and a sixth transistor comprising a first terminal coupled to the first voltage and a second terminal coupled to the gate of the second transistor, and a gate coupled to the gate of the third transistor, wherein the first initialization signal has an enable pulse generated after the two enable pulses of the first scan clock signal and before the two enable pulses of the second scan clock signal. 8. The display device of claim 3 , wherein, during a period when the fourth switch is turned off by a disable level of the first light emission signal, a first enable pulse of the two enable pulses of the first shift output is output as the first scan signal through the third switch, and wherein, during a period when the third switch is turned off by a disable level of the second light emission signal, a second enable pulse of the two enable pulses of the first shift output is output as the second scan signal through the fourth switch. 9. The display device of claim 8 , wherein the disable level of the first light emission signal and the disable level of the second light emission signal do not overlap each other, and wherein the light emission driver generates a third light emission signal having a disable-level overlapping the disable level of the first light emission signal and the disable level of the second light emission signal. 10. The display device of claim 3 , further comprising: a third shift register a stage after the first shift register among the plurality of shift registers is configured to output a third shift output in response to a fourth shift output of a fourth shift register, wherein the fourth shift output comprises two enable pulses synchronized with a third scan clock signal comprising two periodic enable pulses, wherein the third shift output is synchronized with a fourth scan clock signal having two periodic enable pulses, and wherein the fourth shift register is two stages before the third shift register. 11. The display device of claim 10 , wherein the third scan clock signal and the fourth scan clock signal have a half-period phase difference therebetween. 12. The display device of claim 11 , wherein the first scan clock signal and the fourth scan clock signal have a ⅛-period phase difference therebetween, and the second scan clock signal and the third scan clock signal have a ⅛-period phase difference therebetween. 13. The display device of claim 10 , wherein the scan driver is configured to output third and fourth scan signals in response to third and fourth light emission signals among the plurality of light emission signals, by dividing two enable pulses of the third shift output from each other. 14. The display device of claim 13 , wherein a fifth switch among the plurality of switches, which corresponds to the third shift output, is controlled by the fourth light emission signal, and a sixth switch among the plurality of switches, which corresponds to the third shift output, is controlled by the third light emission signal. 15. The display device of claim 14 , wherein, during a period when the sixth switch is turned off by a disable level of the third light emission signal, one of the two enable pulses of the third shift output is output as the third scan signal through the fifth switch, and wherein, during a

Assignees

Inventors

Classifications

  • Details of a shift registers arranged for use in a driving circuit · CPC title

  • with pixel circuitry controlling the current through the light-emitting element · CPC title

  • Details of drivers for scan electrodes · CPC title

  • G11C19/287Primary

    Organisation of a multiplicity of shift registers · CPC title

  • with additional control of the display period without amending the charge stored in a pixel memory, e.g. by means of additional select electrodes · CPC title

Patent family

Related publications grouped by family.

External sources

Frequently asked questions

Answers are generated from the same data shown on this page.

What does patent US9786384B2 cover?
Disclosed is a display device including a light emission driver configured to sequentially generate a plurality of light emission signals having a disable level during a first period; and a scan driver configured to generate a plurality of shift outputs each having two enable pulses, and each outputting two scan signals, in response to two light emission signals among the plurality of light emi…
Who is the assignee on this patent?
Samsung Display Co Ltd
What technology area does this patent fall under?
Primary CPC classification G11C19/287. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Oct 10 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).