Sensing buffer, peripheral circuit, and/or memory device

Patent metadata

Field	Value
Publication number	US-9786337-B2
Application number	US-201615259412-A
Country	US
Kind code	B2
Filing date	Sep 8, 2016
Priority date	Mar 7, 2016
Publication date	Oct 10, 2017
Grant date	Oct 10, 2017

Abstract

A sensing buffer, or peripheral circuit or memory device may be provided. The sensing buffer may be configured to maintain a predetermined current according to a first current regardless of an external power supply and/or a temperature.

First claim

What is claimed is:

1. A sensing buffer, comprising:
a first input circuit coupled between an external power supply and a ground voltage and configured to generate a first current according to a reference voltage;
a first mirror circuit configured to maintain a predetermined current of a first node according to the first current regardless of the external power supply and a temperature applied to the sensing buffer;
a second input circuit including a second node coupled to the first node, wherein a predetermined current of a third node is based on a sensing voltage and the current of the first and second nodes; and
a resistor coupled between the first and second nodes and configured to maintain a predetermined current between the first and second input circuits.

2. The sensing buffer according to claim 1 , wherein the first input circuit receives the external power supply through an external power supply terminal and generates a current path such that the first current flows between the external power supply terminal and a ground voltage terminal in response to the reference voltage.

3. The sensing buffer according to claim 1 , wherein the second input circuit receives the external power supply and generates a current path between the external power supply and the ground voltage in response to the sensing voltage.

4. The sensing buffer according to claim 1 , wherein the first mirror circuit operates in a saturation state such that a predetermined current of the first node flows.

5. The sensing buffer according to claim 1 , further comprising:
a second mirror circuit configured to maintain predetermined currents mirrored in the first mirror circuit.

6. The sensing buffer according to claim 5 , further comprising:
boosting circuits configured for amplifying an amount of an internal current based on a current flowing through the second mirror circuit.

Assignees

• Sk Hynix Inc

Inventors

• Yuk Young Sub

Classifications

• G11C7/04 Primary

  with means for avoiding disturbances due to temperature effects · CPC title

• G11C7/08

  Control thereof · CPC title

• G11C7/065

  Differential amplifiers of latching type · CPC title

• H03K3/356104

  using complementary field-effect transistors (H03K3/35625 takes precedence) · CPC title

• G11C2207/002

  Isolation gates, i.e. gates coupling bit lines to the sense amplifier · CPC title