Systems and methods for missed media sector alignment

Patent metadata

Field	Value
Publication number	US-9786320-B2
Application number	US-201615000088-A
Country	US
Kind code	B2
Filing date	Jan 19, 2016
Priority date	Jan 19, 2016
Publication date	Oct 10, 2017
Grant date	Oct 10, 2017

Abstract

A system includes a first sync mark detector circuit operable to apply a first sync mark detection algorithm to search a received media sector and overhead for a second sync mark after a failure to identify a first sync mark. A second sync mark detector circuit operable to apply a second sync mark detection algorithm to search the received media sector and overhead for the second sync mark. An anchor point identification circuit identifies an anchor point in the received media sector. A retry controller circuit causes a re-read of the received media sector and overhead when the first sync mark detector circuit fails to identify the first sync mark, and aligns the received media sector to yield an aligned media sector. A data processing circuit recovers an original user data set from the aligned media sector.

First claim

What is claimed is:

1. A data processing system, the system comprising:
a first sync mark detector circuit operable to apply a first sync mark detection algorithm to search a received media sector and overhead for a second sync mark after a failure to identify a first sync mark, wherein the received media sector includes a first fragment set corresponding to a first codeword, a second fragment set corresponding to a second codeword, and wherein the first fragment set is shuffled with the second fragment set to yield an intermixed fragment set;
a second sync mark detector circuit operable to apply a second sync mark detection algorithm to search the received media sector and overhead for the second sync mark, wherein the second sync mark detection algorithm is more robust than the first sync mark detection algorithm;
an anchor point identification circuit operable to identify an anchor point in the received media sector;
a retry controller circuit operable to cause a re-read of the received media sector and overhead when the first sync mark detector circuit fails to identify the first sync mark, and to align the received media sector to a forced sync mark at a location calculated based upon a first location of the anchor point and a second location of the second sync mark to yield an aligned media sector; and
a data processing circuit operable to recover an original user data set from the aligned media sector.

2. The data processing system of claim 1 , wherein the data processing system is implemented as part of a storage device.

3. The data processing system of claim 1 , wherein the data processing system is implemented as part of an integrated circuit.

4. The data processing system of claim 1 , wherein the second location of the of the second sync mark is selected from a group consisting of an actual location where the second sync mark was identified, and a likely location of the second sync mark.

5. The data processing system of claim 1 , wherein the first sync mark detection algorithm uses both the first sync mark and a preceding preamble pattern, and wherein the second sync mark detection algorithm uses only the second sync mark.

6. The data processing system of claim 1 , wherein the data processing circuit comprises:
a data detector circuit operable to apply a data detection algorithm to an equalized output corresponding to the aligned media sector to yield a detected output;
a codeword gathering circuit operable to un-shuffle the intermixed fragment set represented by the detected output to yield the first codeword and the second codeword; and
a data decoder circuit operable to apply a data decoding algorithm to the first codeword and the second codeword.

7. The data processing system of claim 6 , wherein the data detection algorithm is selected from a group consisting of a Viterbi data detection algorithm, and a maximum a posteriori data detection algorithm.

8. The data processing system of claim 6 , wherein the data decoding algorithm is a low density parity check decoding algorithm.

9. The data processing system of claim 1 , wherein identifying the anchor point within the media sector includes identifying a first data pattern within the received media sector that is unique within the received media sector and does not exhibit a strong correlation to a second data pattern in the received media sector that includes all but n-bits of the first data pattern plus n-additional consecutive bits, wherein n is an integer value.

10. The data processing system of claim 9 , wherein the first data pattern does not include the first sync mark or the second sync mark.

11. The data processing system of claim 1 , wherein the first sync mark and the second sync mark each include different data patterns.

12. A method for data processing, the method comprising:
receiving a media sector including a first fragment set corresponding to a first codeword, a second fragment set corresponding to a second codeword, wherein the first fragment set is shuffled with the second fragment set to yield an intermixed fragment set;
failing to identify both a first sync mark and a second sync mark associated with the media sector;
identifying an anchor point within the media sector at an anchor location;
using a sync mark identification circuit to re-identify the second sync mark at a second sync mark location, wherein the second sync mark location is selected from a group consisting of an actual location where the second sync mark was identified, and another likely location of the second sync mark;
using the anchor location and the second sync mark location to calculate a first sync mark location;
re-reading the entire media sector to yield a re-read media sector, and aligning the entire re-read media sector to the first sync mark location to yield an aligned media sector; and
processing the aligned media sector using a data detector circuit and a data decoder circuit to yield user data, wherein the user data was originally encoded to yield the first codeword and the second codeword.

13. The method of claim 12 , wherein the failing to identify both the first sync mark and the second sync mark associated with the media sector is done by a first sync mark detector circuit operable to apply a first sync mark detection algorithm and a second sync mark detector circuit operable to apply a second sync mark detection algorithm, the second sync mark detection algorithm is more robust than the first sync mark detection algorithm.

14. The method of claim 12 , wherein processing the aligned media sector comprises:
using the data detector circuit to apply a data detection algorithm to an equalized output corresponding to the aligned media sector to yield a detected output;
un-shuffling the intermixed fragment set represented by the detected output to yield the first codeword and the second codeword; and
using the data decoder circuit to apply a data decoding algorithm to the first codeword and the second codeword.

15. The method of claim 14 , wherein the data detection algorithm is selected from a group consisting of a Viterbi data detection algorithm, and a maximum a posteriori data detection algorithm.

16. The method of claim 14 , wherein the data decoding algorithm is a low density parity check decoding algorithm.

17. The method of claim 12 , wherein identifying the anchor point within the media sector comprises:
identifying a first data pattern within the media sector that is unique within the media sector and does not exhibit a strong correlation to a second data pattern which includes all but n-bits of the first data pattern plus n-additional consecutive bits, wherein n is an integer value.

18. The method of claim 17 , wherein the first data pattern does not include the first sync mark or the second sync mark.

19. The method of claim 12 , wherein the first sync mark and the second sync mark each include a different data pattern.

20. The method of claim 12 , wherein the method is performed in relation to a storage medium.

Assignees

• Avago Technologies General Ip

Inventors

• Yang Yuqing
• Yang Shaohua

Classifications

• H03M13/114

  Shuffled, staggered, layered or turbo decoding schedules · CPC title

• G11B5/59616 Primary

  Synchronisation; Clocking (G11B5/59622 takes precedence) · CPC title

• G11B20/18 Primary

  Error detection or correction; Testing {, e.g. of drop-outs} · CPC title

• G11B5/012

  Recording on, or reproducing or erasing from, magnetic disks (G11B17/00, G11B19/00 take precedence) · CPC title

• G11B2020/1287

  Synchronisation pattern, e.g. VCO fields · CPC title