Asynchronous translation of computer program resources in graphics processing unit emulation

US9786026B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9786026-B2
Application numberUS-201514739988-A
CountryUS
Kind codeB2
Filing dateJun 15, 2015
Priority dateJun 15, 2015
Publication dateOct 10, 2017
Grant dateOct 10, 2017

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Abstract

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Resource processing during run time can be performed asynchronously from emulation of an application by a central processing unit. For example, an emulator can include a main processing thread that performs emulation processes. In response to encountering a shader, or other resource, to be processed, the emulator can invoke a separate asynchronous thread to perform such processing. Processed resources, such as translated shaders and generated textures, can be stored in a cache. In response to a command that uses a resource, such as a draw command that invokes a shader or other resource, the emulator can use the processed resource in the cache. If the processed resource is not in the cache, the emulator can skip processing the command that uses the resource. If processed resources can be obtained from other sources and loaded in the cache, processing of resources by the emulator can be eliminated.

First claim

Opening claim text (preview).

What is claimed is: 1. A computer configured to emulate execution of a graphics application for a first graphics processing unit, the computer comprising: a second graphics processing unit; storage; one or more central processing units configured to execute an emulator application, the emulator application configuring the computer to: convert first commands for the first graphics processing unit, generated by execution of the graphics application by the emulator application, to second commands that instruct the second graphics processing unit; manage a resource cache including translated resources for the second graphics processing unit for a plurality of resources; and in response to a first command being a draw command using a resource, and a determination that a translated resource for the second graphics processing unit corresponding to the resource used by the draw command is not in the resource cache, skip rendering a second command corresponding to the draw command and continue processing by the emulator application. 2. The computer of claim 1 , wherein the resource comprises a shader and the resource cache comprises a shader cache. 3. The computer of claim 2 , wherein the computer is further configured by the emulator application to: detect a first command providing an indication of a shader; determine whether the executable code for the second graphics processing unit for the shader is available in the shader cache; in response to a determination that the executable code for the second graphics processing unit for the shader is not in the shader cache, translate the shader indicated in the first command. 4. The computer of claim 3 , wherein the emulator application, when executed by the computer, is configured to implement a first thread to convert first commands to second commands and at least one second thread, asynchronous to the first thread, to translate shaders. 5. The computer of claim 3 , wherein the shader cache comprises a memory configured to store executable code for the second graphics processing unit and a cache index configured to store, for each shader of the plurality of shaders, a location in the memory of the executable code for the shader. 6. The computer of claim 5 , wherein the computer is further configured by the emulator application to: in response to a determination that the executable code for the second graphics processing unit for the shader is not in the shader cache, add an entry in the cache index for the shader, the entry indicating that the executable code for the second graphics processing unit for the shader is not in the memory. 7. The computer of claim 6 , wherein the computer is further configured by the emulator application to: in response to a determination that the executable code for the second graphics processing unit for the shader is not in the shader cache, add an indication of the shader to a queue for translation. 8. The computer of claim 7 , wherein the computer is further configured by the emulator application to: in response to translation of the shader to provide the executable code for the second graphics processing unit for the shader, update the entry in the cache index for the shader to provide an indication of the location in the memory of the executable code for the second graphics processing unit for the shader. 9. A computer-implemented process for emulating execution of a graphics application for a first graphics processing unit on a computer comprising a second graphics processing unit, the computer-implemented process comprising: converting first commands for the first graphics processing unit, in response to execution of the graphics application using an emulator application, to second commands that instruct the second graphics processing unit; accessing a resource cache including translated resources for the second graphics processing unit for a plurality of resources; and in response to a first command being a draw command using a resource, and a determination that a translated resource for the second graphics processing unit corresponding to the resource used by the draw command is not in the resource cache, skipping rendering a second command corresponding to the draw command and continuing processing by the emulator application. 10. The computer-implemented process of claim 9 , wherein the resource comprises a shader and the resource cache comprises a shader cache. 11. The computer-implemented process of claim 9 , further comprising: detecting a first command providing an indication of a shader; determining whether the executable code for the second graphics processing unit for the shader is available in the shader cache; and in response to a determination that the executable code for the second graphics processing unit for the shader is not in the shader cache, translating the shader indicated in the first command. 12. The computer-implemented process of claim 11 , wherein converting first commands to second commands is performed by a first thread executed on the computer and translating a shader is performed by a second thread, asynchronous to the first thread. 13. The computer-implemented process of claim 11 , wherein the shader cache comprises a memory configured to store executable code for the second graphics processing unit and a cache index configured to store, for each shader of the plurality of shaders, a location in the memory of the executable code for the shader. 14. The computer-implemented process of claim 13 , further comprising: in response to a determination that the executable code for the second graphics processing unit for the shader is not in the shader cache, adding an entry in the cache index for the shader, the entry indicating that the executable code for the second graphics processing unit for the shader is not in the memory. 15. The computer-implemented process of claim 14 , further comprising: in response to a determination that the executable code for the second graphics processing unit for the shader is not in the shader cache, adding an indication of the shader to a queue for translation. 16. The computer-implemented process of claim 15 , further comprising: in response to translation of the shader to provide the executable code for the second graphics processing unit for the shader is not in the shader cache, updating the entry in the cache index for the shader to provide an indication of the location in the memory of the executable code for the second graphics processing unit for the shader. 17. A computer program product, comprising: a computer storage medium configured to store computer program instructions of an emulator application, for emulating execution of a graphics application for a first graphics processing unit on a computer comprising a second graphics processing unit, storage, and one or more central processing units configured to execute the emulator application, the emulator application configuring the computer to: convert first commands for the first graphics processing unit, generated by execution of the graphics application by the emulator application, to second commands that instruct the second graphics processing unit; manage a resource cache including translated resources for the second graphics processing unit for a plurality of resources; and in response to a first command being a draw command using a resource, and a determination that a translated resource for the second graphics processing unit corresponding to the resource used by the draw command is not in the resource cache, skip rendering a second command corr

Assignees

Inventors

Classifications

  • Abstract machines for programme code execution, e.g. Java virtual machine [JVM], interpreters, emulators · CPC title

  • Compilation · CPC title

  • Arrangements for executing specific programs · CPC title

  • Involving translation to a different instruction set architecture, e.g. just-in-time translation in a JVM · CPC title

  • G06T1/20Primary

    Processor architectures; Processor configuration, e.g. pipelining · CPC title

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What does patent US9786026B2 cover?
Resource processing during run time can be performed asynchronously from emulation of an application by a central processing unit. For example, an emulator can include a main processing thread that performs emulation processes. In response to encountering a shader, or other resource, to be processed, the emulator can invoke a separate asynchronous thread to perform such processing. Processed re…
Who is the assignee on this patent?
Microsoft Technology Licensing Llc
What technology area does this patent fall under?
Primary CPC classification G06T1/20. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Oct 10 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 2 related publications on this page (citations in our corpus or others sharing the same primary CPC).