System and method for producing an electronic device

US9785881B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9785881-B2
Application numberUS-201615043885-A
CountryUS
Kind codeB2
Filing dateFeb 15, 2016
Priority dateFeb 15, 2016
Publication dateOct 10, 2017
Grant dateOct 10, 2017

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  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A method and system for producing electronic label are disclosed. The electronic label includes a first substrate and a second substrate. Layout information associated with the electronic label is developed. The layout information is automatically processed to develop print commands, circuit layout information, and component placement information therefrom. Information is printed on the first substrate in accordance with the print information and a conductive trace is deposited on the second substrate in accordance with circuit layout information. Components are placed on the deposited conductive trace in accordance with the component placement information.

First claim

Opening claim text (preview).

We claim: 1. A method for producing an electronic device that includes a substrate, the method comprising the steps of: providing a graphical user interface to develop layout information associated with the electronic device, wherein the layout information specifies a condition that the electronic device is adapted to sense, a location on the substrate of an indicator, and a characteristic of the indicator; processing the layout information to automatically select a processor, a first component adapted to sense the condition, and a second component in accordance with the characteristic of the indicator and to automatically develop from the layout information circuit trace information and component placement information, wherein the component placement information includes placement information of the first component, the second component and the processor, and specification of interconnects between the processor and the first and second components; depositing on the substrate at least one conductive trace in accordance with the circuit trace information; and placing the first and second components and the processor on the at least one deposited conductive trace in accordance with the component placement information. 2. The method of claim 1 , wherein the step of processing the layout information comprises the step of generating a netlist, wherein the netlist identifies components that comprise the electronic device and the interconnections therebetween. 3. The method of claim 2 , wherein the step of processing the layout information comprises supplying the netlist to an automated circuit layout program, and receiving circuit trace information from the circuit layout program. 4. The method of claim 1 , wherein the substrate comprises a first substrate and the electronic device includes a second substrate, and processing the layout information includes developing from the layout commands print commands associated with print information, further including the step of printing on at least one of the first substrate and the second substrate in accordance with the print commands. 5. The method of claim 4 , wherein the step of processing the layout information comprises combining the circuit trace information with the print commands into a single file. 6. The method of claim 1 , wherein the layout information includes information regarding a location on the second and behavior of a sensor. 7. The method of claim 6 , wherein the layout information includes information regarding an action undertaken by the electronic device in response to actuation of the sensor. 8. The method of claim 1 , wherein the indicator is one of a visual indicator, an auditory indicator, or a vibration motor. 9. The method of claim 1 , comprising the further step of finishing the substrate to produce a finished electronic device, wherein finishing the substrate comprises one or more of joining the first substrate with another substrate, die-cutting the substrate, die-cutting the joined substrates, and creating an aperture in the substrate. 10. The method of claim 1 , wherein processing the layout instructions includes the step of generating from the layout information executable instructions to download to the electronic device, and the method comprises the further step of downloading the executable instructions into a memory of the electronic device. 11. A system for producing an electronic device that includes a substrate, comprising: a composition system that includes a graphical user interface to develop layout information associated with the electronic device, wherein the layout information specifies a condition that the electronic device is adapted to sense, a location on the substrate of an indicator, and a characteristic of the indicator; a circuit layout generator that processes the layout information to automatically select a processor, a first component adapted to sense the condition, and a second component in accordance with the characteristic of the indicator and to automatically develop from the layout information circuit trace information and component placement information, wherein the component placement information includes placement information of the first component, the second component and the processor, and specification of interconnects between the processor and the first and second components; a printing system that deposits on the substrate at least one conductive trace in accordance with the circuit trace information; and a component placement system that places the first and second components and the processor on the at least one deposited conductive trace in accordance with the component placement information. 12. The system of claim 11 , wherein the circuit layout generator creates a netlist, wherein the netlist identifies components that comprise the electronic device and the interconnections therebetween. 13. The system of claim 12 , further including an automated circuit layout program that generates circuit trace information. 14. The system of claim 11 , wherein the substrate includes a first substrate and the electronic device includes a second substrate, further including a print command generator that processes the layout information to automatically develop therefrom print commands, and the printing system prints on at least one of the first substrate and the second substrate information in accordance with the print commands. 15. The system of claim 14 , wherein the print command generator combines the circuit trace information with the print commands into a single file. 16. The system of claim 11 , wherein the layout information includes information regarding a location on the substrate and behavior or a sensor. 17. The system of claim 11 , wherein the layout information includes information regarding an action undertaken by the electronic device in response to actuation of the sensor. 18. The system of claim 11 , wherein the indicator is one of a visual indicator, an auditory indicator, or a vibration motor. 19. The system of claim 11 , further including a finishing system to produce a finished electronic device, wherein the finishing system undertakes one or more of joining the substrate with another substrate, die-cutting the substrate, die-cutting the joined substrates, and creating an aperture in the substrate. 20. The system of claim 11 , further including a program generator that generates from the layout information executable instructions to download to the electronic device, and a programming system that downloads the executable instructions into a memory of the electronic device.

Assignees

Inventors

Classifications

  • G06K19/025Primary

    the material being flexible or adapted for folding, e.g. paper or paper-like materials used in luggage labels, identification tags, forms or identification documents carrying RFIDs (methods for testing the genuineness of valuable papers, e.g. banknotes or passports G07D7/00; constructional features of booklets and the like B42D) · CPC title

  • Physical layout of the record carrier · CPC title

  • Methods or arrangements for marking the record carrier in digital fashion · CPC title

  • the visual interface being a single light or small number of lights capable of being switched on or off, e.g. a series of LEDs · CPC title

  • using bar codes · CPC title

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Frequently asked questions

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What does patent US9785881B2 cover?
A method and system for producing electronic label are disclosed. The electronic label includes a first substrate and a second substrate. Layout information associated with the electronic label is developed. The layout information is automatically processed to develop print commands, circuit layout information, and component placement information therefrom. Information is printed on the first s…
Who is the assignee on this patent?
Donnelley & Sons Co
What technology area does this patent fall under?
Primary CPC classification G06K19/025. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Oct 10 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 5 related publications on this page (citations in our corpus or others sharing the same primary CPC).