Migrating data between memory units in server

Patent metadata

Field	Value
Publication number	US-9785375-B2
Application number	US-201615055926-A
Country	US
Kind code	B2
Filing date	Feb 29, 2016
Priority date	Aug 31, 2013
Publication date	Oct 10, 2017
Grant date	Oct 10, 2017

Abstract

Embodiments of the present invention disclose a data migration method for memory modules in a server and a server. By establishing a mirror relationship between agent apparatuses of two memory modules, a processor in the present invention instructs the agent apparatuses to perform data migration between the two memory modules, to complete migration of data from one memory module to the other memory module. The entire data migration process requires no participation of an operating system, and consumes a short period of time, thereby implementing convenient data migration for memory modules in a server.

First claim

What is claimed is:

1. A method for migrating data between memory units in a server, wherein the server comprises a processor, a first memory unit controlled by a first memory management circuit, and a second memory unit controlled by a second memory management circuit, the method comprising:
receiving, by the processor, a data migration request for migrating a data block from the first memory unit to the second memory unit;
obtaining, by the processor, the data block from a first address in the first memory unit;
sending, by the processor, a data migration instruction to the first memory management circuit, wherein the data migration instruction comprises the data block and the first address;
forwarding, by the first memory management circuit, the data block and the first address to the first memory unit, for storing the data block at the first address of the first memory unit;
sending, by the first memory management circuit, the data block and the first address to the second memory management circuit; and
forwarding, by the second memory management circuit, the data block and the first address to the second memory unit, for storing the data block in the second memory unit at a second address, wherein the first address and the second address are correlated with each other in a mirror relationship.

2. The method according to claim 1 , wherein the first memory management circuit is a first home agent, and the second memory management circuit is a second home agent.

3. The method according to claim 1 , wherein sending, by the processor, the data migration instruction to the first memory management circuit comprises:
sending, by the processor, the data block and the first address to a node controller; and
forwarding, by the node controller, the data block and the first address to the first memory management circuit.

4. The method according to claim 1 , wherein sending the data block and the first address to the second memory management circuit comprises:
sending, by the first memory management circuit, the data block and the first address to the second memory management circuit through one or more node controllers.

5. The method according to claim 1 , further comprising:
establishing, by the processor, a mirror relationship between addresses in the first memory unit and addresses in the second memory unit;

wherein the mirror relationship is such that the first address in the first memory unit is the same as the second address in the second memory unit.

6. The method according to claim 1 , further comprising:
setting, by the first memory management circuit, the first memory unit to an idle state; and
setting, by the second memory management circuit, the second memory unit to a running state.

7. The method according to claim 1 , wherein the first memory unit and the second memory unit have the same capacity.

8. A server, comprising:
a processor, a first memory management circuit and a second memory management circuit that are connected to the processor, a first memory unit connected to the first memory management circuit, and a second memory unit connected to the second memory management circuit, wherein:
the processor is configured to: receive a data migration request for migrating a data block from the first memory unit to the second memory unit, obtain the data block from a first address in the first memory unit, and send a data migration instruction to the first memory management circuit, wherein the data migration instruction comprises the data block and the first address;
the first memory management circuit is configured to: receive the data migration instruction, forward the data block and the first address to the first memory unit for storing the data block at the first address of the first memory unit, and send the data block and the first address to the second memory management circuit; and
the second memory management circuit is configured to: receive the data block and the first address from the first memory management circuit, and forward the data block and the first address to the second memory unit, for storing the data block in into the second memory module unit at a second address, wherein the first address and the second address are correlated with each other in a mirror relationship.

9. The server according to claim 8 , wherein the first memory management circuit is a first home agent, and the second memory management circuit is a second home agent.

10. The server according to claim 8 , further comprising one or more node controllers, wherein in sending the data migration instruction to the first memory management circuit, the processor is configured to send the data block and the first address to a node controller, and the node controller is configured to transfer the data block and the first address to the first memory management circuit.

11. The server according to claim 8 , further comprising one or more node controllers, wherein the second memory management circuit is configured to receive the data block and the first address from the first memory management circuit through the one or more node controllers.

12. The server according to claim 8 , wherein the first memory management circuit is further configured to set the first memory unit to an idle state; and the second memory management circuit is further configured to set the second memory unit to a running state.

13. The server according to claim 8 , wherein the first memory unit and the second memory unit have the same capacity.

Assignees

• Huawei Tech Co Ltd

Inventors

• Chen Ben
• Liu Gang

Classifications

• G06F3/061 Primary

  Improving I/O performance · CPC title

• G06F3/067

  Distributed or networked storage systems, e.g. storage area networks [SAN], network attached storage [NAS] · CPC title

• G06F3/0683

  Plurality of storage devices · CPC title

• G06F3/0688

  Non-volatile semiconductor memory arrays · CPC title

• G06F3/0668

  adopting a particular infrastructure · CPC title