Accuracy in a capacitive sense array

Patent metadata

Field	Value
Publication number	US-9785294-B2
Application number	US-201414557202-A
Country	US
Kind code	B2
Filing date	Dec 1, 2014
Priority date	Sep 23, 2011
Publication date	Oct 10, 2017
Grant date	Oct 10, 2017

Abstract

A sense array having at least 3 sets of sense elements disposed substantially parallel with each other, with one of the sense elements of the first set extends between two of the sense elements of the second set and another one of the sense elements of the first set extends between two of the sense elements of the third set.

First claim

What is claimed is:

1. A sense array comprising:
a first set of sense elements comprising 1st, 2nd, and 3rd sense elements disposed substantially parallel to each other, wherein the first set of sense elements is electrically connected together at a first end of the sense array;
a second set of sense elements comprising 4th, 5th, and 6th sense elements disposed substantially parallel to each other, wherein the second set of sense elements is electrically connected together at a second end of the sense array opposite the first end; and
a third set of sense elements comprising 7th, 8th, and 9th sense elements disposed substantially parallel to each other, wherein the 1st sense element extends between the 5th and 6th sense elements, the 2nd sense element extends between the 6th and 7th sense elements, the 3rd sense element extends between the 7th and 8th sense elements, and the third set of sense elements is electrically connected together at the second end of the sense array.

2. The sense array of claim 1 , further comprising a fourth set of sense elements comprising 10 th , 11 th , and 12 th elements disposed substantially perpendicular to each sense element of the first set of sense elements.

3. The sense array of claim 1 , wherein each of the sense elements of the first set of sense elements is disposed substantially parallel to each of the sense elements of the second set of sense elements.

4. The sense array of claim 1 , wherein each of the 1 st , 2 nd and 3 rd sense elements is substantially linear in shape.

5. The sense array of claim 1 , wherein each of the 1 st , 2 nd and 3 rd sense elements is triangular in shape.

6. The sense array of claim 1 , wherein each of the 1 st , 2 nd and 3 rd sense elements comprises a respective chain of connected polygons.

7. The sense array of claim 1 , wherein each of the first, second, and third sets of sense elements is formed from an optically transmissive conductive material.

8. The sense array of claim 1 , wherein each of the first, second, and third sets of sense elements is disposed on an optically transmissive substrate.

9. The sense array of claim 1 , wherein each of the first, second, and third sets of sense elements is configured to be coupled to a capacitance sensor configured to sense the location of a conductive object proximate to the sense array.

10. A processing device comprising:
a host interface; and
a capacitance sensor coupled to the host interface, the capacitance sensor configured to be coupled to a sense array comprising:
a first set of sense elements comprising 1 st , 2 nd , and 3 rd sense elements disposed substantially parallel to each other, wherein the first set of sense elements is electrically connected together at a first end of the sense array;
a second set of sense elements comprising 4 th , 5 th , and 6 th sense elements disposed substantially parallel to each other, wherein the second set of sense elements is electrically connected together at a second end of the sense array opposite the first end; and
a third set of sense elements comprising 7 th , 8 th , and 9 th sense elements disposed substantially parallel to each other, wherein the 1 st sense element extends between the 5 th and 6 th sense elements, the 2 nd sense element extends between the 6 th and 7 th sense elements, the 3 rd sense element extends between the 7 th and 8 th sense elements, and the third set of sense elements is electrically connected together at the second end of the sense array.

11. The processing device of claim 10 , further comprising a fourth set of sense elements comprising 10 th , 11 th and 12 th elements disposed substantially perpendicular to each sense elements of the first set of sense elements.

12. The processing device of claim 10 , wherein each of the sense elements of the first set of sense elements is disposed substantially parallel to each of the sense elements of the second set of sense elements.

13. The processing device of claim 10 , wherein each of the 1 st , 2 nd and 3 rd sense elements is substantially linear in shape.

14. The processing device of claim 10 , wherein each of the 1 st , 2 nd and 3 rd sense elements is triangular in shape.

15. The processing device of claim 10 , wherein each of the 1 st , 2 nd and 3 rd sense elements comprises a respective chain of connected polygons.

16. A method comprising:
at an electronic device having a sense array comprising a first set of sense elements, a second set of sense elements, and a third set of sense elements, one or more processors, and memory storing one or more programs configured for execution by the one or more processors; wherein:
the first set of sense elements comprises 1st, 2nd, and 3rd sense elements disposed substantially parallel to each other, and the first set of sense elements is electrically connected together at a first end of the sense array;

the second set of sense elements comprises 4th, 5th, and 6th sense elements disposed substantially parallel to each other, and the second set of sense elements is electrically connected together at a second end of the sense array opposite the first end; and
the third set of sense elements comprises 7th, 8th, and 9th sense elements disposed substantially parallel to each other, the 1 st sense element extends between the 5th and 6th sense elements, the 2nd sense element extends between the 6th and 7th sense elements, the 3rd sense element extends between the 7th and 8th sense elements, and the third set of sense elements is electrically connected together at the second end of the sense array;

measuring, by the one or more processors, a first set of mutual capacitance values for the first set of sense elements;
measuring, by the one or more processors, a second set of mutual capacitance values for the second set of sense elements; and
calculating a touch location based on the first and second sets of mutual capacitance values.

17. The method of claim 16 , wherein calculating the touch location comprises computing a first set of coordinate values and a second set of coordinate values.

18. The method of claim 17 , wherein calculating the touch location further comprises averaging the first set of coordinate values and the second set of coordinate values.

19. The method of claim 17 , further comprising transmitting the touch location to a host using a host interface of the electronic device.

20. The method of claim 16 , wherein the sense array comprises a fourth set of sense elements disposed substantially perpendicular to each sense element of the first set of sense elements.

Assignees

• Parade Tech Ltd

Inventors

• Peng Tao
• Landry Gregory

Classifications

• G06F3/044 Primary

  by capacitive means · CPC title

• G06F2203/04104

  Multi-touch detection in digitiser, i.e. details about the simultaneous detection of a plurality of touching locations, e.g. multiple fingers or pen and finger · CPC title

• G06F3/0416 Primary

  Control or interface arrangements specially adapted for digitisers · CPC title

• H03K17/962

  Capacitive touch switches · CPC title

• G06F2203/04112

  Electrode mesh in capacitive digitiser: electrode for touch sensing is formed of a mesh of very fine, normally metallic, interconnected lines that are almost invisible to see. This provides a quite large but transparent electrode surface, without need for ITO or similar transparent conductive material · CPC title