Semiconductor device

Patent metadata

Field	Value
Publication number	US-9780738-B2
Application number	US-201214239810-A
Country	US
Kind code	B2
Filing date	Aug 21, 2012
Priority date	Aug 22, 2011
Publication date	Oct 3, 2017
Grant date	Oct 3, 2017

Abstract

A semiconductor device is provided with: a field-effect transistor that has a source electrode and a drain electrode that are connected to a semiconductor layer, a gate electrode that is provided on the surface of the semiconductor layer between the source electrode and the drain electrode, and a field plate electrode that is provided on the surface of the semiconductor layer in the vicinity of the gate electrode via an insulating layer, wherein the field-effect transistor amplifies high frequency signals received by the gate electrode to be outputted from the drain electrode; and a voltage dividing circuit that divides a potential difference between the drain electrode and a reference potential GND, and applies a bias voltage such that respective parts of the field plate electrode have a mutually equal potential.

First claim

The invention claimed is:

1. A semiconductor device, comprising:
a field-effect transistor that has a source electrode and a drain electrode connected to a semiconductor layer, a gate electrode provided on a surface of the semiconductor layer between the source electrode and the drain electrode, and a field plate electrode provided on the surface of the semiconductor layer in a vicinity of the gate electrode via an insulating layer, wherein the field-effect transistor amplifies radio frequency (RF) signals transmitted in an RF signal path including the gate electrode and the drain electrode, the RF signals are received by the gate electrode and outputted from the drain electrode; and
a voltage dividing circuit that divides potential difference between the drain electrode and a reference potential, and applies a bias voltage such that respective parts of the field plate electrode have a mutually equal potential,
wherein a choke inductor is disposed between a bias power supply of the drain electrode and the RF signal path such that the bias power supply is isolated from the RF signal path by the choke inductor.

2. The semiconductor device according to claim 1 , being configured such that channel narrowing, caused by carriers being injected to the surface of the semiconductor in the vicinity of the gate electrode, is suppressed by a bias voltage applied to the field plate electrode.

3. The semiconductor device according to claim 1 , wherein
the source electrode is connected to the surface of the semiconductor layer opposing the drain electrode, with a predetermined distance from the drain electrode that is connected to the surface of the semiconductor layer,
the gate electrode is arranged on the surface of the semiconductor layer between the drain electrode and the source electrode, with a predetermined distance, respectively from the drain electrode and the source electrode, and
the field plate electrode is arranged so as to partially overlap a portion of the gate electrode nearest the drain electrode in plane view, wherein an insulating film is disposed between the gate electrode and the field plate electrode such that a distance between a surface of the gate electrode and a surface of the field plate electrode is constant.

4. The semiconductor device according to claim 1 , wherein a source of the field-effect transistor is connected to the reference potential.

5. The semiconductor device according to claim 1 , wherein a source of the field-effect transistor is connected to the reference potential via a resistance.

6. The semiconductor device according to claim 1 , wherein
the voltage dividing circuit comprises a first resistor connected between the drain and the field plate electrode, and a second resistor connected between the field plate electrode and the reference potential,
the second resistor includes a non-linear resistance element, and
a positive voltage is applied as a DC voltage with respect to the reference potential by the voltage dividing circuit, to the field plate electrode.

7. The semiconductor device according to claim 1 , wherein
the voltage dividing circuit comprises a first resistor connected between the drain electrode and the field plate electrode, and a second resistor connected between the field plate electrode and the reference potential, and
the second resistor includes a semiconductor element having a constant voltage characteristic.

8. The semiconductor device according to claim 6 , wherein the second resistor includes a plurality of diode elements connected in series in a forward direction.

9. The semiconductor device according to claim 6 , wherein a resistance value of the first resistor is 1 k n or more.

10. The semiconductor device according to claim 1 , wherein total resistance value of the voltage dividing circuit is 1 k n or more.

11. The semiconductor device according to claim 1 , wherein the field-effect transistor and the voltage dividing circuit are formed on an upper layer of the same semiconductor region.

12. The semiconductor device according to claim 1 , wherein the gate electrode is Schottky-connected to a semiconductor layer, and channel narrowing caused by carrier injection to the semiconductor layer from the gate electrode is suppressed by a bias voltage applied to the field plate electrode.

13. The semiconductor device according to claim 1 , wherein the gate electrode is arranged on a surface of the semiconductor layer via an insulating layer.

14. The semiconductor device according to claim 1 , wherein the field-effect transistor is a hetero-junction field-effect transistor that uses a nitride semiconductor.

15. The semiconductor device according to claim 1 , wherein the field plate electrode is arranged so as to partially overlap a portion of the gate electrode.

16. The semiconductor device according to claim 1 , wherein the field plate electrode includes a first portion that overlaps the gate electrode in a cross-sectional view and a second portion that does not overlap the gate electrode in the cross-sectional view.

17. The semiconductor device according to claim 16 , wherein the second portion of the field plate electrode is closer to the drain electrode than the first portion of the field plate electrode.

18. The semiconductor device according to claim 17 , wherein distance between the second portion of the field plate electrode and the drain electrode is constant in a plane view of the semiconductor device.

Assignees

• Ota Kazuki
• Renesas Electronics Corp

Inventors

• Ota Kazuki

Classifications

• H10D62/8503

  Nitride Group III-V materials, e.g. AlN or GaN · CPC title

• H01L29/7786

  Electricity · mapped topic

• H03F3/16 Primary

  with field-effect devices · CPC title

• H01L29/402

  Electricity · mapped topic

• H01L29/2003

  Electricity · mapped topic