Digital slope control for switched capacitor dc-dc converter

US9780655B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9780655-B2
Application numberUS-201514685911-A
CountryUS
Kind codeB2
Filing dateApr 14, 2015
Priority dateOct 27, 2011
Publication dateOct 3, 2017
Grant dateOct 3, 2017

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

Representative implementations of devices and techniques minimize switching losses in a switched capacitor dc-dc converter. The slope of the charging and/or discharging phase may be modified, smoothing the transitions from charge to discharge and/or discharge to charge of the switched capacitor.

First claim

Opening claim text (preview).

What is claimed is: 1. A system comprising: an energy storage element; a plurality of switches coupled to the energy storage element, wherein at least one switch of the plurality of switches comprises a set of sub-switches; a switch control element arranged to control a switch state of each sub-switch of the set of sub-switches to meet a target conductance value that is represented by a digital word received at the switch control element; and a slope control element arranged to control a conductance rate of change of the at least one switch to meet the target conductance value over a number of clock cycles that is a function of the digital word. 2. The system of claim 1 , wherein the digital word represents which sub-switches of the set of sub-switches are in an open state, and which sub-switches of the set of sub-switches are in a closed state. 3. The system of claim 1 , wherein the switch control element is arranged to map bits of the digital word to a number of sub-switches of the set of sub-switches. 4. The system of claim 3 , further comprising control lines, and wherein the switch control element is arranged to map the bits of the digital word to the number of sub-switches of the set of sub-switches via the control lines. 5. A system comprising: a direct current to direct current converter (dc-dc converter), including: an energy storage element; and a plurality of switches coupled to the energy storage element, wherein at least one switch of the plurality of switches comprises a set of sub-switches; a switch control element arranged to control a switch state of each sub-switch of the set of sub-switches, based on a load coupled to an output of the dc-dc converter, to meet a target conductance value that is represented by a digital word; and a slope control element arranged to control a conductance rate of change of the at least one switch to meet the target conductance value over a number of clock cycles that is a function of the digital word and to delay switching of one or more sub-switches of the set of sub-switches. 6. The system of claim 5 , wherein each sub-switch of the set of sub-switches has a maximum conductance substantially equivalent to the maximum conductance of the at least one switch divided by a total number of sub-switches in the set. 7. The system of claim 5 , wherein the slope control element is arranged to regulate a rate of change of at least one of a charge phase and a discharge phase of the energy storage element. 8. The system of claim 5 , wherein the switch control element is arranged to control the switch state of each sub-switch of the set of sub-switches based on the digital word which is received at the switch control element. 9. The system of claim 8 , wherein the digital word represents which sub-switches of the set of sub-switches are in an open state, and which sub-switches of the set of sub-switches are in a closed state. 10. The system of claim 8 , wherein the switch control element is arranged to map bits of the digital word to a number of sub-switches of the set of sub-switches. 11. The system of claim 10 , further comprising control lines, and wherein the switch control element is arranged to map the bits of the digital word to the number of sub-switches of the set of sub-switches via the control lines. 12. The system of claim 8 , further comprising control lines mapping bits of the digital word to a number of sub-switches of the set of sub-switches, and wherein the slope control element is arranged to insert one or more delay elements at the control lines during each clock cycle to delay switching of the number of sub-switches based on a number of delay elements inserted. 13. The system of claim 8 , wherein the slope control element is arranged to insert sets of ascending or descending numbers of delay elements at sets of adjacent control lines. 14. The system of claim 5 , wherein the slope control element comprises a low pass filter arranged to receive the digital word and output a smoothed slope control signal to the switch control element. 15. A system comprising: a direct current to direct current converter (dc-dc converter), including: an energy storage element; and a plurality of switches coupled to the energy storage element, wherein at least one switch of the plurality of switches comprises a set of sub-switches; a switch control element arranged to control a switch state of each sub-switch of the set of sub-switches, based on a load coupled to an output of the dc-dc converter, to meet a target conductance value that is represented by a digital word; a slope control element arranged to control a conductance rate of change of the at least one switch to meet the target conductance value over a number of clock cycles that is a function of the digital word; and control lines mapping bits to sub-switches of the set of sub-switches, and wherein the slope control element is arranged to insert one or more delay elements at the control lines during each clock cycle to delay switching of the sub-switches based on a number of delay elements inserted. 16. The system of claim 15 , wherein each sub-switch of the set of sub-switches has a maximum conductance substantially equivalent to the maximum conductance of the at least one switch divided by a total number of sub-switches in the set. 17. The system of claim 15 , wherein the slope control element is arranged to regulate a rate of change of at least one of a charge phase and a discharge phase of the energy storage element. 18. The system of claim 15 , wherein the switch control element is arranged to control the switch state of each sub-switch of the set of sub-switches based on the digital word which is received at the switch control element. 19. The system of claim 18 , wherein the digital word represents which sub-switches of the set of sub-switches are in an open state, and which sub-switches of the set of sub-switches are in a closed state.

Assignees

Inventors

Classifications

  • with digital control · CPC title

  • H02M3/07Primary

    using capacitors charged and discharged alternately by semiconductor devices with control electrode {, e.g. charge pumps} · CPC title

  • H02M3/158Primary

    including plural semiconductor devices as final control devices for a single load · CPC title

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Frequently asked questions

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What does patent US9780655B2 cover?
Representative implementations of devices and techniques minimize switching losses in a switched capacitor dc-dc converter. The slope of the charging and/or discharging phase may be modified, smoothing the transitions from charge to discharge and/or discharge to charge of the switched capacitor.
Who is the assignee on this patent?
Infineon Technologies Ag
What technology area does this patent fall under?
Primary CPC classification H02M3/07. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Oct 03 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).