Protection from hard commutation events at power switches

US9780636B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9780636-B2
Application numberUS-201514599847-A
CountryUS
Kind codeB2
Filing dateJan 19, 2015
Priority dateJan 19, 2015
Publication dateOct 3, 2017
Grant dateOct 3, 2017

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A system is described that includes a half-bridge, a first driver, a second driver, and a controller unit. The half-bridge includes a first switch coupled to a second switch at a switching node. The first driver is configured to drive the first switch and the second driver is configured to drive the second switch. The controller unit is configured to determine whether a hard commutation event is likely to occur at the half-bridge during a future switching cycle, and responsive to determining that the hard commutation event is likely to occur during the future switching cycle, control the first driver and the second driver to activate at least one hard commutation countermeasure.

First claim

Opening claim text (preview).

The invention claimed is: 1. A method comprising: during a current switching cycle of first and second power switches of a half-bridge of a resonant converter, determining whether a hard commutation event will occur at the half-bridge during a future switching cycle of the first and second power switches; responsive to determining that the hard commutation event will occur during the future switching cycle, activating at least one hard commutation countermeasure by disabling a low-ohmic output of a driver of at least one of the first and second power switches and enabling a high-ohmic output of the driver, wherein the high-ohmic output of the driver has a greater impedance value than the low-ohmic output of the driver; and responsive to determining that the hard commutation event will not occur during the future switching cycle, refraining from activating the at least one hard commutation countermeasure by disabling the high-ohmic output of the driver and enabling the low-ohmic output of the driver. 2. The method of claim 1 , wherein activating the at least one hard commutation countermeasure prevents the hard commutation event or at least protects at least one of the first and second power switches from the hard commutation event. 3. The method of claim 1 , wherein determining whether the hard commutation event will occur during the future switching cycle comprises: determining a direction of current flowing between a switching node of the half-bridge and a resonant capacitor of the resonant converter; determining a respective operating state of each of the first and second power switches; determining, based on the direction of the current and the respective operating states of the first and second power switches, whether the first power switch is operating in reverse operation mode by conducting on a respective body diode of the first power switch while the second switch is conducting through a forward conduction channel of the second switch; and responsive to determining that the first power switch is operating in the reverse operation mode while the second switch is conducting through the forward conduction channel, determining that the hard commutation event will occur during the future switching cycle. 4. The method of claim 1 , wherein determining whether the hard commutation event will occur during the future switching cycle comprises: determining a respective direction of current flowing through each of the first and second power switches; determining, based on the respective directions of the current flowing through each of the first and second power switches, whether the first power switch is operating in reverse operation mode while the second switch is conducting through a forward conduction channel of the second switch; and responsive to determining that the first power switch is operating in the reverse operation mode while the second switch is conducting through the forward conduction channel, determining that the hard commutation event will occur during the future switching cycle. 5. The method of claim 1 , wherein determining whether the hard commutation event will occur during the future switching cycle comprises: determining a respective voltage across each of the first and second power switches; determining whether the first power switch is operating in reverse operation mode while the second switch is conducting through a forward conduction channel of the second switch based on the respective voltages across each of the first and second power switches; and responsive to determining that the first power switch is operating in the reverse operation mode while the second switch is conducting through the forward conduction channel, determining that the hard commutation event will occur during the future switching cycle. 6. The method of claim 1 , wherein determining whether the hard commutation event will occur during the future switching cycle comprises: determining a first voltage across one of the first and second power switches; determining a second voltage across a DC link of the half-bridge; determining whether the first power switch is operating in reverse operation mode while the second switch is conducting through a forward conduction channel of the second switch based on the first voltage and the second voltage; and responsive to determining that the first power switch is operating in the reverse operation mode while the second switch is conducting through the forward conduction channel, determining that the hard commutation event will occur during the future switching cycle. 7. The method of claim 1 , wherein the first power switch is configured to remain switched-off during the future switching cycle, and wherein activating the at least one countermeasure comprises enabling the high-ohmic output of the driver of the first power switch. 8. The method of claim 1 , wherein the second power switch is configured to switch-on during the future switching cycle, wherein activating the at least one countermeasure comprises enabling the high-ohmic output of the driver of the second power switch to slow-down the switch-on of the second power switch. 9. The method of claim 1 , wherein the second power switch is configured to switch-on during the future switching cycle, wherein activating the at least one countermeasure comprises refraining from switching-on the second power switch during the future switching cycle. 10. The method of claim 9 , wherein activating the at least one countermeasure further comprises switching-on the first power switch during the future switching cycle. 11. The method of claim 1 , wherein the future switching cycle is a next, subsequent switching cycle that immediately follows the current switching cycle in-time. 12. The method of claim 1 , wherein the impedance value of the high-ohmic output of the driver is between 5 ohms and 100 ohms and the impedance value of the low-ohmic output of the driver is between 0.1 ohms and 5 ohms. 13. A controller unit for a power circuit, the controller unit being configured to: during a current switching cycle of a half-bridge, determine whether a hard commutation event will occur at the half-bridge during a future switching cycle, wherein the half-bridge includes a first switch coupled to a second switch at a switching node; and responsive to determining that the hard commutation event will occur during the future switching cycle, activate at least one hard commutation countermeasure by disabling a low-ohmic output of a driver of at least one of the first and second switches and enabling a high-ohmic output of the driver, wherein the high-ohmic output of the driver has a greater impedance value than the low-ohmic output of the driver; and responsive to determining that the hard commutation event will not occur during the future switching cycle, refrain from activating the at least one hard commutation countermeasure by disabling the high-ohmic output of the driver and enabling the low-ohmic output of the driver. 14. The controller unit of claim 13 , wherein the controller unit is further configured to: receive, from a measurement unit, an indication of electrical characteristics of the half-bridge being sensed by the measurement unit; and determine whether the hard commutation event will occur at the half-bridge during the future switching cycle based at least in part of the electrical characteristics. 15. The controller unit of claim 13 , wherein the controller unit is configured to determine whether the hard commutation event will occur at the half-bridge during the future switching cycle based at least in part on a dire

Assignees

Inventors

Classifications

  • specially adapted for use for children or babies {; Mounting frames therefor} · CPC title

  • G05F1/56Primary

    using semiconductor devices in series with the load as final control devices (G05F1/461 takes precedence) · CPC title

  • A47K3/024Primary

    specially adapted for use for children or babies · CPC title

  • H02M1/08Primary

    Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters · CPC title

  • in field-effect transistor switches · CPC title

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What does patent US9780636B2 cover?
A system is described that includes a half-bridge, a first driver, a second driver, and a controller unit. The half-bridge includes a first switch coupled to a second switch at a switching node. The first driver is configured to drive the first switch and the second driver is configured to drive the second switch. The controller unit is configured to determine whether a hard commutation event i…
Who is the assignee on this patent?
Infineon Technologies Austria Ag
What technology area does this patent fall under?
Primary CPC classification G05F1/56. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Oct 03 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 3 related publications on this page (citations in our corpus or others sharing the same primary CPC).