Superconductor device interconnect structure

US9780285B1 · US · B1

Patent metadata
FieldValue
Publication numberUS-9780285-B1
Application numberUS-201615238375-A
CountryUS
Kind codeB1
Filing dateAug 16, 2016
Priority dateAug 16, 2016
Publication dateOct 3, 2017
Grant dateOct 3, 2017

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  1. Title

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  5. First independent claim

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Abstract

Official abstract text for this publication.

A method is provided of forming a superconductor device interconnect structure. The method includes forming a first dielectric layer overlying a substrate, and forming a base electrode in the first dielectric layer with the base electrode having a top surface aligned with the top surface of the first dielectric layer. The method further comprises forming a Josephson junction (JJ) over the base electrode, depositing a second dielectric layer over the JJ, the base electrode and the first dielectric layer, and forming a first contact through the second dielectric layer to the base electrode to electrically couple the first contact to a first end of the JJ, and a second contact through the second dielectric layer to a second end of the JJ.

First claim

Opening claim text (preview).

What is claimed is: 1. A method of forming a superconductor device interconnect structure, the method comprising: forming a first dielectric layer overlying a substrate; forming a base electrode in the first dielectric layer, the base electrode having a top surface aligned with the top surface of the first dielectric layer; forming a Josephson junction (JJ) over the base electrode; depositing a second dielectric over the JJ, the base electrode and the first dielectric layer; and forming a first contact through the second dielectric layer to the base electrode to electrically couple the first contact to a first end of the JJ, and a second contact through the second dielectric layer to a second end of the JJ. 2. The method of claim 1 , wherein the JJ is formed from an Aluminum/Aluminum oxide layer disposed between the base electrode and a niobium layer. 3. The method of claim 2 , wherein the base electrode is formed from niobium. 4. The method of claim 1 , wherein the second contact has a diameter that is smaller than the diameter of the JJ. 5. The method of claim 1 , wherein the dielectric material employed in the first dielectric layer and the second dielectric layer is a material that can form the dielectric first and second material layers at a temperature of about 160° Celsius. 6. The method of claim 1 , further comprising forming a first conductive line overlying the first contact and second conductive line overlying the second contact, wherein the first and second conductive lines have a top surface that is aligned with a top surface of the second dielectric layer. 7. The method of claim 6 , wherein the first and second contacts and the first and second conductive lines are formed by a dual damascene process. 8. The method of claim 1 , wherein the base electrode is formed by a single damascene process. 9. The method of claim 1 , wherein the formation of the JJ comprises: depositing an aluminum layer over the base electrode and the first dielectric layer; oxidizing the aluminum layer to form an aluminum oxide layer on the top surface of the aluminum layer; forming a niobium layer over the aluminum oxide layer; depositing and patterning a photoresist material layer over the niobium layer to define dimensions of the Josephson junction; etching the niobium layer, the aluminum oxide layer and the aluminum layer to form a JJ and remove the remaining portions of the niobium layer, the aluminum oxide layer and the aluminum layer; and stripping the photoresist material layer. 10. The method of claim 1 , further comprising forming one or more layers between the substrate and the first dielectric layer. 11. A method of forming a superconductor device interconnect structure, the method comprising: forming a first dielectric layer overlying a substrate; forming a niobium base electrode in the first dielectric layer, the niobium base electrode having a top surface aligned with the top surface of the first dielectric layer; depositing an aluminum layer over the base electrode and the first dielectric layer; oxidizing the aluminum layer to form an aluminum oxide layer on the top surface of the aluminum layer; forming a niobium layer over the aluminum oxide layer; depositing and patterning a photoresist material layer over the niobium layer to define dimensions of the Josephson junction (JJ); etching the niobium layer, the aluminum oxide layer and the aluminum layer to form a JJ based on the defined dimensions and removing the remaining portions of the niobium layer, the aluminum oxide layer and the aluminum layer; stripping the photoresist material layer; depositing a second dielectric layer over the JJ, the base electrode and the first dielectric layer; forming a first contact through the second dielectric layer to the base electrode to electrically couple the first contact to a first end of the JJ, and a second contact through the second dielectric to a second end of the JJ; and forming a first conductive line overlying the first contact and second conductive line overlying the second contact, wherein the first and second conductive lines have a top surface that is aligned with a top surface of the second dielectric layer. 12. The method of claim 11 , wherein the second contact has a diameter that is smaller than the diameter of the JJ. 13. The method of claim 11 , wherein the dielectric material employed in the first dielectric layer and the second dielectric layer is a material that can form the dielectric first and second material layers at a temperature of about 160° Celsius. 14. The method of claim 11 , wherein the first and second contacts and the first and second conductive lines are formed by a dual damascene process. 15. The method of claim 11 , wherein the base electrode is formed by a single damascene process. 16. A superconductor device interconnect structure comprising: a first dielectric layer overlying a substrate; a niobium base electrode disposed in the first dielectric layer, the niobium base electrode having a top surface aligned with the top surface of the first dielectric layer; a Josephson junction (JJ) disposed over and in contact with the base electrode; a second dielectric that overlays the JJ, the base electrode and the first dielectric layer; a first contact that extends through the second dielectric layer from a top surface of the second dielectric layer to the base electrode to electrically couple the first contact to a first end of the JJ; and a second contact that extends through the second dielectric layer to a second end of the JJ. 17. The structure of claim 16 , wherein the JJ is formed from an Aluminum/Aluminum oxide layer disposed between the base electrode and a niobium layer. 18. The structure of claim 16 , wherein the second contact has a diameter that is smaller than the diameter of the JJ. 19. The structure of claim 16 , wherein the dielectric material employed in the first dielectric layer and the second dielectric layer is a material that can form the dielectric first and second layers at a temperature of about 160° Celsius. 20. The structure of claim 16 , further a first conductive line overlying the first contact and a second conductive line overlying the second contact, wherein the first and second conductive lines have a top surface that is aligned with a top surface of the second dielectric layer.

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What does patent US9780285B1 cover?
A method is provided of forming a superconductor device interconnect structure. The method includes forming a first dielectric layer overlying a substrate, and forming a base electrode in the first dielectric layer with the base electrode having a top surface aligned with the top surface of the first dielectric layer. The method further comprises forming a Josephson junction (JJ) over the base …
Who is the assignee on this patent?
Kirby Christopher F, Rennie Michael, O'Donnell Daniel J, and 1 more
What technology area does this patent fall under?
Primary CPC classification H01L39/223. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Oct 03 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (B1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 2 related publications on this page (citations in our corpus or others sharing the same primary CPC).