Image sensors including conductive pixel separation structures

Patent metadata

Field	Value
Publication number	US-9780142-B1
Application number	US-201715630498-A
Country	US
Kind code	B1
Filing date	Jun 22, 2017
Priority date	Mar 4, 2013
Publication date	Oct 3, 2017
Grant date	Oct 3, 2017

Abstract

An image sensor includes a substrate having adjacent pixel regions and respective photodiode regions therein, and a pixel separation portion including a trench extending into the substrate between the adjacent pixel regions. The trench includes a conductive common bias line therein and an insulating device isolation layer between the common bias line and surfaces of the trench. A conductive interconnection is coupled to the common bias line and is configured to provide a negative voltage thereto. Related fabrication methods are also discussed.

First claim

What is claimed is:

1. An image sensor, comprising:
a substrate comprising a plurality of pixel regions, the substrate having a first surface and a second surface opposite the first surface, wherein the second surface is arranged to receive incident light;
photoelectric conversion parts in the pixel regions of the substrate;
gate electrodes and floating diffusion regions in the pixel regions of the substrate;
a pixel separation structure including a first isolation region and a second isolation region in the substrate that separate the pixel regions from each other, wherein the first isolation region includes an insulating device isolation layer and a metal element, and the second isolation region includes an impurity-doped region; and
doped ground regions disposed between adjacent ones of the floating diffusion regions,
wherein the first isolation region is in contact with the second surface and spaced apart from the first surface, and the second isolation region is disposed between the first isolation region and the first surface.

2. The image sensor of claim 1 , wherein the second isolation region is doped with an impurity type different from the photoelectric conversion part.

3. The image sensor of claim 1 , wherein the metal element include a metal-containing layer.

4. The image sensor of claim 3 , wherein the doped ground regions are doped with an impurity type different from the floating diffusion regions.

5. The image sensor of claim 1 , further comprising a shallow device isolation layer in contact with the first surface and spaced apart from the first isolation region, the shallow device isolation layer having a depth less than that of the first isolation region.

6. The image sensor of claim 1 , wherein in plan view, the floating diffusion regions and the doped ground regions are arranged in a straight line.

7. The image sensor of claim 1 , wherein the gate electrode includes a protruding portion positioned on the substrate and a buried portion inserted into the substrate.

8. The image sensor of claim 6 , wherein the substrate further comprises an optical black region spaced apart from the pixel region,
wherein the image sensor further comprises an optical black pattern provided on the optical black region.

9. The image sensor of claim 6 , wherein the substrate further comprises a pad region spaced apart from the pixel region,
wherein the image sensor further comprises a through via provided through the pad region.

10. The image sensor of claim 1 , wherein at least a portion of the photoelectric conversion part overlaps the floating diffusion regions and the doped ground regions.

11. An image sensor, comprising:
a substrate comprising a plurality of pixel regions, the substrate having a first surface and a second surface opposite the first surface, wherein the second surface is arranged to receive incident light;
photoelectric conversion parts in the pixel regions of the substrate;
gate electrodes and floating diffusion regions in the pixel regions of the substrate;
a pixel separation structure including a first isolation region and a second isolation region in the substrate that separate the pixel regions from each other, wherein the first isolation region includes an insulating device isolation layer, and the second isolation region includes an impurity-doped region; and
doped ground regions disposed between adjacent ones of the floating diffusion regions,
wherein the first isolation region is in contact with the second surface and spaced apart from the first surface, and the second isolation region is disposed between the first isolation region and the first surface, and
wherein in plan view, the floating diffusion regions and the doped ground regions are arranged in a straight line.

Assignees

• Samsung Electronics Co Ltd

Inventors

• Koo Junemo
• Kim Namgil
• Moon Changrok
• Park Byungjun
• Shin Jongcheol

Classifications

• H01L27/14689 Primary

  Electricity · mapped topic

• H01L27/1463

  Electricity · mapped topic

• H01L27/14636

  Electricity · mapped topic

• H01L27/1464

  Electricity · mapped topic

• H01L27/14623

  Electricity · mapped topic