Semiconductor device and method for manufacturing the same

Patent metadata

Field	Value
Publication number	US-9780012-B2
Application number	US-201414894787-A
Country	US
Kind code	B2
Filing date	Nov 10, 2014
Priority date	Dec 12, 2013
Publication date	Oct 3, 2017
Grant date	Oct 3, 2017

Abstract

A semiconductor device includes: an interlayer insulating film covering: a cathode region and an anode region to form a pn junction with each other; a cathode electrode provided on the interlayer insulating film and connected to the cathode region through a first contact hole; and an anode electrode provided on the interlayer insulating film and connected to the anode region through a second contact hole. Among current paths in the cathode and anode regions, the current path in one of the cathode and anode regions that has a larger sheet resistance is shorter than the other current path, the current path in the cathode region extending from an interface of the pn junction to an end of the first contact hole closest to the interface, the current path in the anode region extending from the interface to an end of the second contact hole closest to the interface.

First claim

The invention claimed is:

1. A semiconductor device, comprising:
a cathode region provided on an insulating film and is made by a first conductivity-type thin-film semiconductor layer;
an anode region provided on the insulating film to form a pn junction with the cathode region and is made by a second conductivity-type thin-film semiconductor layer;
an interlayer insulating film covering the cathode and anode regions;
a cathode electrode provided on the interlayer insulating film and is connected to the cathode region through a first contact hole penetrating the interlayer insulating film; and
an anode electrode provided on the interlayer insulating film and is connected to the anode region through a second contact hole penetrating the interlayer insulating film,
wherein among current paths in the cathode and anode regions, the length of the current path in one of the cathode and anode regions that has a larger sheet resistance is shorter than the length of the other current path, the current path in the cathode region extending from an interface of the pn-junction to an end of the first contact hole closest to the interface, the current path in the anode region extending from the interface to an end of the second contact hole closest to the interface.

2. The semiconductor device of claim 1 , wherein the following is satisfied when the sheet resistance of the cathode region is larger than the sheet resistance of the anode region:
0.1<=( Lnx/Lpx )<=0.9

where Lnx and Lpx are the lengths of the current paths in the cathode and anode regions, respectively.

3. The semiconductor device of claim 1 , wherein the following is satisfied when the sheet resistance of the cathode region is smaller than the sheet resistance of the anode region:
0.1<=( Lpx/Lnx )<=0.9

where Lnx and Lpx are the lengths of the current paths in the cathode and anode regions, respectively.

4. The semiconductor device of claim 1 , wherein the first and second conductivity-type thin-film semiconductor layers are polysilicon layers.

5. A method for manufacturing a semiconductor device, comprising:
implanting first impurity ions into a thin-film semiconductor layer provided on an insulating film;
implanting second impurity ions into a part of the thin-film semiconductor layer with the first impurity ions implanted;
activating the first and second impurity ions to form an anode region in a region with the first impurity ions implanted and form a cathode region in a region with the second impurity ions implanted so as to form a pn junction with the anode region;
forming an interlayer insulating film covering the thin-film semiconductor layer; and
forming a first contact hole penetrating the interlayer insulating film to expose a part of the cathode region and forming a second contact hole penetrating the interlayer insulating film to expose a part of the anode region,
wherein the following is satisfied:
0.1<=( Lnx/Lpx )<=0.9

where Lnx is the length of a current path extending from the interface of a pn junction to an end of the first contact hole closest to the interface and Lpx is the length of a current path extending from the interface to an end of the second contact hole closest to the interface.

6. The method of claim 5 , wherein the dose of the first impurity ions is 1×10 14 cm −2 to 5×10 14 cm −2 and the dose of the second impurity ions is about 1×10 15 cm −2 to 1×10 16 cm −2 .

Assignees

• Fuji Electric Co Ltd

Inventors

• Yao Noriaki
• Abe Hitoshi

Classifications

• H10P30/204

  into Group IV semiconductors · CPC title

• H10P30/21

  of electrically active species · CPC title

• H10W10/01

  Manufacture or treatment · CPC title

• H10W10/00

  Isolation regions in semiconductor bodies between components of integrated devices · CPC title

• H10W40/00 Primary

  Arrangements for thermal protection or thermal control (integrated devices comprising arrangements for thermal protection H10D89/60) · CPC title