Slave device, master device, and communication method

Patent metadata

Field	Value
Publication number	US-9778971-B2
Application number	US-201214131717-A
Country	US
Kind code	B2
Filing date	Jan 20, 2012
Priority date	Sep 27, 2011
Publication date	Oct 3, 2017
Grant date	Oct 3, 2017

Abstract

A slave device is equipped with: a parameter setting portion for setting different values according to the content of commands sent from a master device, as parameter values for detecting anomalies; and an anomaly detecting portion for detecting anomalies by comparing the time corresponding to a parameter value that has been set by the parameter setting portion and the measured time of a process carried out in response to a command.

First claim

What is claimed is:

1. A slave device operative in a slave mode in accordance with an IIC (Inter Integrated Circuit) protocol, comprising a processor performing the functions of:
a command holding circuit for identifying a bit indicating command content from a serial data line signal transmitted to the slave device from a master device according to a serial clock line signal transmitted to the slave device from the master device and holding the command content, the master device being operative in a master mode in accordance with the IIC protocol;
a parameter setting circuit for setting, as values of a parameter for detecting anomalies, different values according to whether the command content indicates a read operation or a write operation; and
an anomaly detecting circuit for detecting the anomalies by comparing a time corresponding to the parameter value set by the parameter setting circuit with time measured in processing performed responsive to the commands; wherein
the anomaly detecting circuit includes,
a counter which counts time for which the serial clock line signal is held at a predetermined level, and
a comparator which issues a communication anomaly signal when the time counted by the counter exceeds the time corresponding to the parameter value set by the parameter setting portion;
wherein the anomaly detecting circuit detects the anomalies when the comparator issues the communication anomaly signal.

2. The slave device of claim 1 , wherein:
the parameter setting circuit makes the time corresponding to the parameter value set when the command content indicates a read operation longer than the time corresponding to the parameter value set when the command content indicates a write operation.

3. The slave device of claim 1 , wherein the processor further performs the function of an interface circuit for performing communication via a serial clock line and a serial data line, wherein:
when the command content indicates a write operation, the parameter value is a threshold value corresponding to a time for which a signal on the serial clock line remains at a prescribed level while write data are being processed;
when the command content indicates a read operation, the parameter value is a threshold value corresponding to the time for which the signal on the serial clock line remains at the prescribed level while read data are being processed; and
the anomaly detecting circuit measures the time for which the signal on the serial clock line remains at the prescribed level.

4. The slave device of claim 1 , wherein:
when the command content indicates a write operation,
the parameter value is a threshold value corresponding to a time from command reception until reception of write data, and
the anomaly detecting circuit measures the time from command reception until the reception of the write data; and
when the command content indicates a read operation,
the parameter value is a threshold value corresponding to the time from command reception until transmission of read data, and
the anomaly detecting circuit measures the time from command reception until the transmission of the read data.

5. The slave device of claim 1 , wherein:
the anomaly detecting circuit includes a counter for measuring the time, and detects an anomaly when a value of the counter exceeds the parameter value.

6. The slave device of claim 1 , wherein the processor further performs the function of an initializing circuit that resets communication with the master device when the anomaly detecting circuit detects an anomaly.

7. A master device operative in a master mode in accordance with an IIC (Inter Integrated Circuit) protocol, comprising processor performing the function of:
a parameter setting circuit that sets different values according to command content of commands that the master device transmits to a slave device operating in a slave mode in accordance with the IIC protocol; and
an anomaly detecting circuit that detects anomalies by comparing a time corresponding to a parameter value set by the parameter setting circuit with a time measured in processing performed responsive to the commands.

8. The master device of claim 7 , wherein:
the parameter setting circuit makes the time corresponding to the parameter value set when the command content indicates a read operation longer than the time corresponding to the parameter value when the command content indicates a write operation.

9. The master device of claim 7 , wherein the processor further performs the function of an interface circuit for performing communication via a serial clock line and a serial data line, wherein:
when the command content indicates a write operation, the parameter value is a threshold value corresponding to a time for which a signal on the serial clock line remains at a prescribed level while write data are being processed;
when the command content indicates a read operation, the parameter value is a threshold value corresponding to the time for which the signal on the serial clock line remains at the prescribed level while read data are being processed; and
the anomaly detecting circuit measures the time for which the signal on the serial clock line remains at the prescribed level.

10. The master device of claim 7 , wherein:
when the command content indicates a write operation,
the parameter value is a threshold value corresponding to a time from command transmission until transmission of write data, and
the anomaly detecting circuit measures the time from command transmission until the transmission of the write data; and
when the command content indicates a read operation,
the parameter value is a threshold value corresponding to the time from command transmission until reception of read data, and
the anomaly detecting circuit measures the time from command transmission until the reception of the read data.

11. The master device of claim 7 , wherein:
the anomaly detecting circuit includes a counter for measuring the time, and detects an anomaly when a value of the counter exceeds the parameter value.

12. The master device of claim 7 , wherein the processor further performs the function of an initializing circuit that resets communication with the slave device when the anomaly detecting circuit detects an anomaly.

13. The master device of claim 7 , wherein:
the parameter setting portion sets the different values depending on whether the command content is a read command or a write command.

14. A communication method carried out by a slave device operating in a slave mode in accordance with an IIC (Inter Integrated Circuit) protocol, comprising:
a parameter setting process for setting different values according to command content of commands transmitted from a master device operating in a master mode in accordance with the IIC protocol, as parameter values for detecting anomalies; and
an anomaly detecting process for detecting the anomalies by comparing a time corresponding to a parameter value set by the parameter setting process with a time measured in processing performed responsive to the commands.

15. The communication method of claim 14 , wherein the parameter setting process makes the time corresponding to the parameter value set when the command content indicates a read operation longer than the time corresponding to the parameter value set when the command content indicates a write operation.

16. The communication method of claim 14 , wherein:
when the command content indicates a write operation, the parameter value is a threshold value corresponding to a time for which a signal on t

Assignees

• Michihata Satoshi
• Maruyama Kiyoyasu
• Miki Satoko
• Fukuta Tomonori
• Tanaka Kazuhiro
• Mitsubishi Electric Corp

Inventors

• Michihata Satoshi
• Maruyama Kiyoyasu
• Miki Satoko
• Fukuta Tomonori
• Tanaka Kazuhiro

Classifications

• G06F11/0751 Primary

  Error or fault detection not based on redundancy (power supply failures G06F1/30; network fault management H04L41/06) · CPC title

• G06F13/4282 Primary

  on a serial bus, e.g. I2C bus, SPI bus (on daisy chain buses G06F13/4247) · CPC title