Time synchronization system

Patent metadata

Field	Value
Publication number	US-9778679-B2
Application number	US-201414903771-A
Country	US
Kind code	B2
Filing date	Jul 1, 2014
Priority date	Jul 10, 2013
Publication date	Oct 3, 2017
Grant date	Oct 3, 2017

Abstract

A control device 2 includes a preset time determinator 22 for determining a preset time to be set to a first real-time clock of a terminal device 3 based on a second real-time clock. The terminal device 3 includes a latency time timer 34 for clocking a lapse of a latency time which is a period of time from the terminal device 3 acquiring the preset time until the preset time being set to the first real-time clock and is calculated in a clocking accuracy having the number of effective figures greater than that of the first real-time clock, and a time setter 32 for setting the preset time to the first real-time clock when the latency time is lapsed.

First claim

What is claimed is:

1. A time synchronization system, comprising:
one or more terminal devices, each having a first real-time clock; and
a control device having a second real-time clock of which the number of effective digits per clocking is greater than that of the first real-time clock,
wherein the control device includes a preset time determinator for determining a preset time to be set to the first real-time clock of the terminal device based on the second real-time clock, and
wherein the terminal device includes:
a latency time timer for clocking a lapse of a latency time, the latency time being a period of time from the terminal device acquiring information containing the preset time until the preset time being set to the first real-time clock based on the information, the latency time being calculated in a clocking accuracy having the number of effective digits greater than that of the first real-time clock, and the latency time being a period of time in which, when lapsed, a fraction of clocking of the second real-time clock relative to a lowest digit position of clocking of the first real-time clock becomes zero; and
a time setter for setting the preset time to the first real-time clock when the latency time is lapsed.

2. The time synchronization system of claim 1 , wherein the control device further includes a latency time calculator for calculating the latency time by subtracting from the preset a time required for the terminal device to acquire the preset time.

3. The time synchronization system of claim 2 , wherein the control device calculates the latency time when setting the same preset time to at least two or more terminal devices, so that a difference in timings of acquiring the preset time between two of the terminal devices is in agreement with a difference in the latency times between the two terminal devices.

4. The time synchronization system of claim 1 , wherein the terminal device is driven by a battery, and acquires the preset time and the latency time by wirelessly communicating with the control device.

5. The time synchronization system of claim 1 , wherein the control device calculates a timing at which the terminal device acquires the preset time, based on the number of hops between the control device and the terminal device.

6. A method of setting time using a control device comprising:
one or more terminal devices, each having a first real-time clock; and
a control device having a second real-time clock of which the number of effective digits per clocking is greater than that of the first real-time clock,
wherein the control device includes a preset time determinator for determining a preset time to be set to the first real-time clock of the terminal device based on the second real-time clock, and
wherein the terminal device includes:
a latency time timer for clocking a lapse of a latency time, the latency time being a period of time from the terminal device acquiring information containing the preset time until the preset time being set to the first real-time clock based on the information, and the latency time being calculated in a clocking accuracy having the number of effective digits greater than that of the first real-time clock, and the latency time being a period of time in which, when lapsed, a fraction of clocking of the second real-time clock relative to a lowest digit position of clocking of the first real-time clock becomes zero; and
a time setter for setting the preset time to the first real-time clock when the latency time is lapsed.

Assignees

• Tlv Co Ltd

Inventors

• HAGIHARA Kazunari

Classifications

• G04G5/00

  Setting, i.e. correcting or changing, the time-indication (radio-controlled time-pieces G04R) · CPC title

• G04G7/00

  Synchronisation (radio-controlled time-pieces G04R) · CPC title

• G06F1/12

  Synchronisation of different clock signals {provided by a plurality of clock generators} · CPC title

• G06F1/14 Primary

  Time supervision arrangements, e.g. real time clock · CPC title